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Bds96 - Instituto de Ingeniería Eléctrica
Bds96 - Instituto de Ingeniería Eléctrica

... corresponds to (W/L) of 29 for the nMOS transistors and 69.5 for the pMOS transistors. The corresponding VGS value for this transistors sizes is 0.7V for VT0=0.85V and 0.85V for VT0=1V. This values of VGS are compatible with condition (1) with a 2V power supply and VDSAT corresponding to operation n ...
Circuit for Square Root of Multiplication
Circuit for Square Root of Multiplication

... these transistors is in pinch – off and the other in the triode region of operation. (iv) Liu’s square rooter [7] in which second generation current conveyors is used as high performance active building block. A further extension of square rooter circuit is the square root of multiplication of two v ...
May 1998 200µA, 1.2MHz Rail-to-Rail Op Amps Have Over-The-Top Inputs
May 1998 200µA, 1.2MHz Rail-to-Rail Op Amps Have Over-The-Top Inputs

... latest general-purpose, low power, dual rail-to-rail operational amplifier; the LT1639 is a quad version. The circuit topology of the LT1638 is based on Linear Technology’s popular LT1490/LT1491 op amps, with substantial improvements in speed. The LT1638 is five times faster than the LT1490. The LT1 ...
ADN2890 数据手册DataSheet 下载
ADN2890 数据手册DataSheet 下载

... OUTN. It is also necessary for the PIN/NIN input traces to be matched in length, and OUTP/OUTN output traces to be matched in length to avoid skew between the differential traces. C1, C2, C3, and C4 are ac-coupling capacitors in series with the high speed I/O. It is recommended that components be us ...
AN-6024 — FMS6xxx Product Series Understanding Analog Video Signal Clamps, Bias, Description
AN-6024 — FMS6xxx Product Series Understanding Analog Video Signal Clamps, Bias, Description

... amplitude. The first disadvantage with this approach is the necessity for an input capacitor (although this capacitor can be relatively small in value, typically 0.1uF). Second, there is a die area cost associated with having this function in the device. Third, the internal sync stripper must be des ...
CBC3 specification document (Word)(uploaded 25/5
CBC3 specification document (Word)(uploaded 25/5

... closest to the matching Cluster from the Seed layer, will be selected (i.e. the one giving the least amount of bend and therefore, in theory, the highest pT track).When the logic identifies a correlation between Clusters in the two layers (called a stub), the Seed Cluster location is output to the S ...
power-one,inc. (map55-4001) acdc
power-one,inc. (map55-4001) acdc

... NUCLEAR AND MEDICAL APPLICATIONS - Power-One products are not designed, intended for use in, or authorized for use as critical components in life support systems, equipment used in hazardous environments, or nuclear control systems without the express written consent of the respective divisional pre ...
Mar 2002 Unique Instrumentation Amplifier Precisely Senses Differential Voltages from mV to V
Mar 2002 Unique Instrumentation Amplifier Precisely Senses Differential Voltages from mV to V

... the maximum allowable differential input is from –VREF up to (V+ – 1.3V – VREF). The total differential input voltage range is therefore V+ – 1.3V. For instance, if the LTC2053 is powered with a single 5V supply and if its reference pin is biased at +2.0V, the maximum differential input voltage for ...
8bit 12-channel D/A converter
8bit 12-channel D/A converter

MAX3693 +3.3V, 622Mbps, SDH/SONET 4:1 Serializer with Clock Synthesis and LVDS Inputs
MAX3693 +3.3V, 622Mbps, SDH/SONET 4:1 Serializer with Clock Synthesis and LVDS Inputs

... frequency-synthesizing PLL (consisting of a phase/ frequency detector, loop filter/amplifier, voltagecontrolled oscillator, and prescaler). This device converts 4-bit-wide, 155Mbps data to 622Mbps serial data (Figure 1). The PLL synthesizes an internal 622Mbps reference used to clock the output shif ...
16-bit stereo D / A converter for audio applications
16-bit stereo D / A converter for audio applications

COEN6511 LECTURE 3
COEN6511 LECTURE 3

Dec 2003 - Project Status Review IR SYSTEMS
Dec 2003 - Project Status Review IR SYSTEMS

A high-frequency CMOS multi-modulus divider for PLL frequency
A high-frequency CMOS multi-modulus divider for PLL frequency

... frequency divider (including a prescaler) [1–3]. The phase detector compares the phase of the input signal against the divided phase of the VCO. The output of the phase detector is a measure of the phase difference between the two inputs. The difference voltage is then filtered by the loop filter an ...
IDT2309 - Integrated Device Technology
IDT2309 - Integrated Device Technology

... All outputs should be uniformly loaded in order to achieve Zero I/O Delay. Since the CLKOUT pin is the internal feedback for the PLL, its relative loading can affect and adjust the input/output delay. The Output Load Difference diagram illustrates the PLL's relative loading with respect to the other ...
Presentation 2
Presentation 2

... conversion. The rest of the functions of this pin will be disabled by the software program i.e. keyboard interrupt etc.(pg 20 of data sheet) 2. According to the datasheet (p46), a 0.01uF capacitor can be used to improve the performance of ADC by reducing noise; it needs to be placed as close as poss ...
Implementation Technologies
Implementation Technologies

Isolated 4 to 20 mA Transmitters For Demanding Applications
Isolated 4 to 20 mA Transmitters For Demanding Applications

... Overvoltage of 120 Vac may be applied across the input or output leads for 1 minute for all models with voltage or thermocouple inputs. Reverse polarity of 400 Vp may be applied across the output leads indefinitely. These exceptionally high NMV overvoltage ratings ...
Analog Component Development for 300°C Sensor Interface
Analog Component Development for 300°C Sensor Interface

... Yellow = IN Green = OUT Purple = OUTB ...
24 Bit To 48 Bit Registered Buffer With SSTL_2 Inputs And Outputs
24 Bit To 48 Bit Registered Buffer With SSTL_2 Inputs And Outputs

Ear Manual
Ear Manual

... When connecting a digital source such as CD, DVD or DAC, these devices generally output higher signal than a standard line level. This apparent increase can be easily adjusted via the volume control. In the standalone mode (METHOD 2) where the ear is not required to feed a signal to another amplifi ...
UB System - LA Audio
UB System - LA Audio

555timer - EngineeringDuniya.com
555timer - EngineeringDuniya.com

... alternately charges and discharges between the two comparator threshhold voltages. When charging, C starts at (1/3)VCC and charges towards VCC. However, it is interrupted exactly halfway there, at (2/3)VCC. Therefore, the charging time, t1 = 0.693 RA + RB)C. When the capacitor voltage reaches (2/3)V ...
Neutralization Circuit of 28 MHz RHIC Amplifier Collider
Neutralization Circuit of 28 MHz RHIC Amplifier Collider

Lesson T5B - Math and Gain
Lesson T5B - Math and Gain

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Flip-flop (electronics)



In electronics, a flip-flop or latch is a circuit that has two stable states and can be used to store state information. A flip-flop is a bistable multivibrator. The circuit can be made to change state by signals applied to one or more control inputs and will have one or two outputs. It is the basic storage element in sequential logic. Flip-flops and latches are a fundamental building block of digital electronics systems used in computers, communications, and many other types of systems.Flip-flops and latches are used as data storage elements. A flip-flop stores a single bit (binary digit) of data; one of its two states represents a ""one"" and the other represents a ""zero"". Such data storage can be used for storage of state, and such a circuit is described as sequential logic. When used in a finite-state machine, the output and next state depend not only on its current input, but also on its current state (and hence, previous inputs). It can also be used for counting of pulses, and for synchronizing variably-timed input signals to some reference timing signal.Flip-flops can be either simple (transparent or opaque) or clocked (synchronous or edge-triggered). Although the term flip-flop has historically referred generically to both simple and clocked circuits, in modern usage it is common to reserve the term flip-flop exclusively for discussing clocked circuits; the simple ones are commonly called latches.Using this terminology, a latch is level-sensitive, whereas a flip-flop is edge-sensitive. That is, when a latch is enabled it becomes transparent, while a flip flop's output only changes on a single type (positive going or negative going) of clock edge.
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