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Design and Evaluation of a Modular Resonant Switched Capacitors Equalizer for PV Panels Shmuel (Sam) Ben-Yaakov, Alon Blumenfeld, Alon Cervera, and Michael Evzelman Power Electronics Laboratory Department of Electrical and Computer Engineering Ben-Gurion University of the Negev P.O. Box 653, Beer-Sheva, 84105 Israel sby@ee.bgu.ac.il; alonblu@bgu.ac.il; cervera@bgu.ac.il; evzelman@ee.bgu.ac.il Website: www.ee.bgu.ac.il/~pel/ Abstract—A switched-capacitor based equalization scheme is proposed for overcoming the adverse effect of shaded panels in a serially connected PV array. The proposed solution is based on a modular approach, in which each two panels are connected to a resonant switched-capacitor converter. The distribution of currents and power extraction improvement have been derived and verified experimentally and design guidelines to meet desired power loss level requirements have been developed. The experimental equalizing module was designed for 185W PV panels and was found to boost the maximum available power by about 50% when interfaced with two serially connected PV panels under insolation ratios between 20% and 100%. The analytical, simulation and experimental results suggest that the proposed approach is effective in extracting all available power with relatively high efficiency. I. INTRODUCTION Full or partial shading of PV panels, which are part of a serially connected array, limits the power that can be extracted from the chain [1, 2]. Two groups of solutions have been proposed to remedy the shading problem: solutions that are based on a dedicated converter/inverter per panel [3-4] and those that keep the series connection of the panels, but replenish the lower current of the shaded panel(s) with parallel feedback circuitry [5-7]. The parallel circuitry approach can be simplified by taking advantage of the following two facts: the panels’ voltages at the MPP are close for different insolation levels and the MPP voltage has a rather broad peak so that small deviations from it have a minimal effect on the power output [8]. Hence, the parallel circuitry only needs to equalize the panels’ voltages, while the global MPPT can be carried out by a central inverter, which is fed by the string of the PV panels [6]. Voltage equalization can be carried out by converters that are fed from the output of the PV array [5, 6] or by equalizing adjacent panels [9, 10]. The latter has a number of advantages such as being self contained and hence shorter interconnections and a lower voltage on the switches. The downside of the localized equalizer approach is the fact that the equalizing current needs to propagate from one module to another to replenish the missing current in the shaded This research was supported by the ISRAEL SCIENCE FOUNDATION (Grants No. 476/08 and No. 517/11). 978-1-4673-0803-8/12/$31.00 ©2012 IEEE panel and this may increase the losses due to the longer conduction path. The adjacent panels equalization approach has been previously studied using a buck-boost converter [9, 10]. The present study explores an alternative method for adjacent panels equalization using a switched capacitor converter (SCC). The SCC approach has been suggested for battery and capacitor voltage equalization [11, 12], but has not yet been examined or optimized for PV panel equalization. An SCC has some advantages over inductorbased DC-DC converters, such as lower EMI and potentially smaller size [13, 14]. It is particularly suitable for voltage equalization since the expected efficiency is high when the input and output voltages are equal or close [15-20]. The power loss by the equalizing SCC circuitry will depend on the operational mode of the converter and the pertinent parameters, such as the switching frequency, Rds(on), of the switches and the ESR of the capacitors [15-20]. The objective of this study is to examine the modular SCC-based PV panel equalization approach, to develop design guidelines for its optimal operation and to verify the analytical predictions of its performance by simulation and experiments. II. MODULAR EQUALIZING SCC (EQSCC) – THE CONCEPT The design concept investigated in this study applies to a serially connected PV panel string, which feeds a gridconnected inverter. The inverter is assumed to include a controller with a Maximum Power Point Tracking (MPPT) algorithm that keeps the string at the MPP operating point. The proposed approach is based on a modular construction (Fig. 1) in which EQSCC units, each with a single flying capacitor, are used to equalize the voltages of two adjacent PV panels. The EQSCCs are bidirectional, unity converters that employ 4 switches (QA(i)-QD(i)) each and are used to connect a flying capacitor, Cf(i), in parallel to one panel and then to its neighboring panel. An intuitive overview of the equalization operation can be obtained by considering a simplified equivalent circuit (Fig. 2); in the circuit each panel is emulated as a current source with passive circuitry [21] and each EQSCC as an isolated 1:1 “DC transformer” emulated as two dependent sources with series resistances (Re(1), Re(2)) that represent the internal losses. 4129 ID(k-1) EQSCC (k-1) so that the voltage drop across them is negligible. This implies that the panels’ voltages are equal. One can now apply KCL equations to derive the relationships between the currents in the system. The first KCL equation determines IL – the current passing through the chain to the load, and is applied on one of the two EQSCC-PV-load junctions seen in figure 2. The second KCL equation determines ID – the differential average current transferred by the EQSCC, and is applied on the central EQSCC-PV junction. The equations can be written as: IO QA(k-1) + QB(k-1) PV(k-1) - C(k-1) ID(k-1) IL ID(k) ID(k-1) IS QC(k-1) QA(k) + PV(k) QD(k-1) EQSCC(k) - ID(k-1) IL IO { QB(k) ID(k) ID(k) QC(k) + C(k) where IO is the non-shaded panel current and IS is the shaded panel current. Assuming that all the panels have the same MPP voltage, VMPP , their voltages are forced equal by the EQSCCs. Furthermore, assuming that the global controller keeps the system in MPP, the power output of the system, Po, will be: PV(k+1) - ID(k) QD(k) (2) implying that all of the total available power is delivered to the load. The above analysis can be extended to a more general case of N panels with N-1 EQSCC systems, where a single panel is partially shaded. To be consistent, the panels and EQSCCs are numbered by the index k from top to bottom (Fig. 1). Differential current, , for EQSCC k (Fig. 1) can be expressed by: Figure 1. Schematic diagram of two EQSCC modules connected to three PV panels in a string. IL PV1 IO IirrO RS R P IO PV2 IS IirrS EQSCC (1) Re1 V1 2ID(1) RS RP Re2 { (3) ID(1) where S represents the location of the shaded panel in the chain. The equations above imply that the differential currents are inversely proportional to N and that as we move further away from the shaded panel, S, ID is reduced by . Ignoring losses, the power to the load and the output current will be the maximum available from the array: ID(1) + V(1) - Figure 2. Average model of an EQSCC connected to two equivalent circuits of a PV panel. This arrangement equalizes the voltage of the two adjacent panels and, consequently, of all the panels in the string (to within the voltage drop caused by the losses). Furthermore, the “transformer” coupling replenishes the missing current of a shaded panel through the EQCC modules (Fig. 1), by moving it from panels above and below. The magnitude of the circulating currents and the expected losses are derived in the analysis given below. III. (1) THEORETICAL ANALYSIS Starting with the case of two panels (Fig. 2), it is initially assumed that the EQSCC is ideal, i.e. the selection of the components in the design makes Re(1) and Re(2) small enough ∑ (4) ∑ (5) While the above simplistic analysis helps to clarify the operation of the EQSCC, it fails to describe the two main causes for losses in the system: conduction losses and possible deviations of the MPP voltages from one panel to another. These are considered next. As shown in section II, the SCC can be represented by an average model consisting of an isolated 1:1 transformer with series equivalent resistances, Re1 and Re2, that represent the losses during the charging and discharging phases (Fig. 2). The equivalent resistance is a convenient parameter of the SCC since it relates the losses to the average current passing through the converter rather than to the instantaneous currents during charging and discharging. That is, the conduction losses can be calculated by (Iav)2Re, where Iav is the average current at the output (or input in case of a unity 4130 gain SCC). For the hard switched SCC, the total equivalent resistance can be expressed as [15, 16]: ( ) ( ) (6) where i is the index of the equivalent subcircuit/operation phase, fs is the switching frequency, ti is the operation period of the ith SCC subcircuit, Ri is the original total loop resistance (Rds_on of the MOSFETs and ESR of the capacitor), Ci is the total loop capacitance and βi is the SCC operation mode ratio [15, 17-20]. The value of the equivalent resistance, which will determine the SCC loss, depends on the operational mode of the SCC, namely, the shape of the charging/discharging current. We distinguish between three operation modes depending on the operation ratio, βi (6). The case of βi >> 1 is referred to as the ‘Complete Charge’ mode (CC). This applies when the switching duration, ti, is larger than the time constant (RiCi) of the subcircuit and the charge/discharge process is nearly completed (Fig. 3a). In this region the expression for Re (6) converges to 1/(fsCi). When βi << 1, we term the mode ‘No Charge’ (NC). Here,the switching duration, ti, is smaller than the time constant (RiCi) of the subcircuit and the charge/discharge current is almost constant (Fig. 3c). In this region the expression for Re (6) converges to 4Ri. When βi ≈ 1, the mode is named ‘Partial Charge’ (PC). The duration, ti, is of the same order of magnitude as the time constant (RiCi) of the subcircuit (Fig. 3b). smaller capacitors may not have a low enough ESR as would be required to achieve the power loss goal and that operating at high frequency may induce resonant, rather than exponential, currents due to parasitic leakage inductances. Resonant currents that are synchronized to the switching frequency are beneficial since they offer low losses and ZCS switching. The resonant operation mode is induced when the charging/discharging paths include inductors, which can be either an intentionally inserted inductor or simply a parasitic inductance. Soft switching (ZCS) is achieved when the on time of each subcircuit matches the half period of the resonant current. In this case, the charging/discharging capacitor current will be of a sinusoidal nature. The equivalent resistance of a unity gain SCC operating in this mode is (7), (8), [16]: (7) √ √ (8) √ where Li is the RLC loop inductance. This expression for Re in the resonant mode is valid for the quality factor range of Qi > 0.5. From (7), the minimum equivalent resistance value of Rei ≈ (π2Ri/4) is achieved for (Q>3) [16], and hence the minimum achievable equivalent resistance for unity gain SCC is approximately 5R, where R i The lowest possible value of equivalent resistance is achieved in the NC mode, as can be seen in the plot of normalized equivalent resistance (Rei* = Rei / Ri) for a single subcircuit of a unity gain SCC as a function of beta (Fig. 4). In this case βi <<1, i.e. the switching time is very short as compared to the SCC subcircuit time constant. Since in this case the average and RMS currents are nearly equal (Fig. 3c), the losses are the lowest possible. The other limit is the CC operation mode (Fig. 4). In this mode the equivalent resistance is frequency dependent and increases with the increase of βi. This mode is much less efficient, due to the exponential, spike-like nature of the current, which flows in the SCC subcircuits (Fig. 3a). It is thus evident that from the power loss point of view, NC operation is preferred since it ensures the lowest possible Re. However, operating in the deep NC mode (βi <<1) is undesirable since it requires either very large capacitors or very high switching frequencies with no added value. In fact, the optimal operating point is βi =1, for which (1/2fsCi) = Ri. At this operating point, Re is very close to its minimum value (Re≈4.3Ri for the unity gain SCC), while the figure of merit fsCi is at its lowest. High switching frequency can thus be selected to reduce the size of the capacitor. However, high switching frequency has its own downside, which is an increase in switching losses that will increase the effective Re. Other issues that need to be taken into account are that 4131 i CC IC av i i i(t) Ti (a) t PC i i(t) Ti (b) i t Im NC i i(t) t Ti (c) Figure 3. Charge/Discharge instantaneous current waveforms: (a) Complete Charge – 'CC' mode, (b) Partial Charge – 'PC' mode, (c) No Charge – 'NC' mode. 10 R*e i 8 6 4 NC Mode PC Mode βi 2 0.1 CC Mode 1 10 Figure 4. Normalized equivalent resistance for a single subcircuit of a unity gain SCC. is the loop resistance of each subcircuit (assumed to be equal). Fig. 5 presents the dependence of the normalized equivalent resistance (Rei* = Rei / Ri) of a single RLC subcircuit on the quality factor. It is assumed in this plot that the switching period matches the damped resonance frequency. It is evident that quality factors higher than 3 (Fig. 5, point B), do not contribute to any further reduction of the equivalent resistance. Furthermore, once the loop resistance and switching frequency are set, higher Qs call for larger inductors and are thus undesirable. Very low quality factors, below 0.8, result in higher equivalent resistances and, consequently, higher losses. Hence, the optimal operation point is between the two limits and around Qi ≈ 1 (Fig. 5, point A). At this value, the equivalent resistance and, consequently, the losses are very close to their minimum possible value. It should be mentioned that although operation in the soft switching mode is preferable, due to the lower switching losses, an inductor is required to maintain a desired quality factor. This fact enlarges and complicates the system unless sufficient inductance is already present in the system’s components, layout and interconnections (which was the case in the present study). Another issue to consider is the control implementation. Efficient operation in soft switching mode requires precise turn-off when the current reaches zero. This can be achieved either by inserting diodes to block the oscillation in the reverse direction, which will result in additional diode conduction losses, or by employing zero current sensing for control. Based on the above discussion and given the differential currents and the equivalent resistances (which are assumed to be equal for all EQSCCs), the power dissipated by the equalizing system of a PV panel array with one shaded panel can be estimated as: ∑ ( [∑ ) ] ∑ (9) and the efficiency is defined as: (10) 3.5 Re* i A 3 B 2.5 2 Qi 0 1 3 5 10 Figure 5. Dependence of the normalized equivalent resistance of an RLC subcircuit on the subcircuit's quality factor (Qi). The above expressions assume that all the panels are kept at the same voltage by the EQSCC modules. In reality, some voltage variation is expected due to the fact that when a current is passing through an EQSCC it will cause a voltage drop across Re which will, in turn, cause a voltage difference between the panels served by the EQSCC. The magnitude of this deviation will be equal to ID(k)Re. This fact is an additional reason to keep Re as small as practical. IV. SIMULATIONS A. Efficiency Analysis Based on (9) and (10), a numerical analysis was carried out using MATLAB® (Ver. R2010b) to estimate the efficiency, η, of the total energy extraction as a function of S – the (single) shaded panel location in the chain, and N – the number of panels in the chain. In this analysis the following parameters were used for the complete system: each EQSCC had an equivalent resistance of Re=1Ω and MPP panel data of V = 22V, IO = 8A. The results of these analyses (Fig. 6) show the dependence of the efficiency on the number of panels in the chain for the worst case situation, when the shaded panel is at the center of the chain. A second impact on the efficiency that needs to be taken into account is the effect of the insolation level on the panels’ MPP voltage. As pointed out above, due to the voltage drop across the SCC the voltage of the shaded panel is expected to stabilize at a lower level than that of the nonshaded one. This may shift the operating point from the MPP. Furthermore, as reported in [6-8], the distribution of internal resistances within the PV panels may cause the MPP voltage to increase or decrease for an increase in insolation level. Consequently, the voltage drop caused by the EQSCC may have a positive or a negative effect on the PV’s efficiency, depending on the direction of the MPP voltage shift caused by changes in the PV insolation. Considering the complexity of the system, its variability and the many parameters involved, circuit simulations and field experiments were carried out to get better insight into the loss issues. B. System Simulations Using Average Models Simulations were performed using the SPICE (OrCAD PSpice, Cadence Design Systems, Inc. ver. 16.3) platform. In these, a PV panel was modeled as a current source, diode and parasitic resistance [21] and the EQSCC was modeled in the same way as the previously discussed average model (Fig. 2). Two circuits were run in parallel: a system with two serially connected panels, to which the proposed equalization scheme was connected, and an identical system with no equalization. The parameters of the PV model were: parallel resistance Rp=200Ω, series resistance Rs=1Ω, ideality factor of the model’s diode N=30, and irradiation current for the non-shaded panel Iirr=10A. Sweep results for the case of one panel shaded to 50% and one panel nonshaded are shown in Fig. 7(a), demonstrating the improvement of power extracting efficiency when the 4132 proposed equalization scheme is used. The “recovery efficiency” r, is defined as: 100% 95% (11) where Pmpp(load) is the maximum power obtained at the load and (i=1,2) is the maximum available power from each panel (as if it had its own MPPT control). Fig. 8 shows the efficiency as a function of the normalized irradiation level of the shaded panel. The trace representing the recovery efficiency without equalization has an inverse peak created by the jump between the two MPP points of the system (Fig. 8). The comparison of the two curves η [%] 100 78% 66% 50% 0 V. 92 n 90 7 14 Figure 6. Power extraction efficiency for a PV chain with one shaded PV in the center of the array as a function of the number of panels: solid curves - with EQSCC, dashes - shaded PV is bypassed, IN/IS - insolation ratios of shaded to non-shaded panels. Po [W] 270 W 215 W 180 W 0 0 50 Vo [V] 25 (a) Po [W] 150 W 105 W 105 W 100 0 0 0.25 0.5 Irradiance Ratio 0.75 1 (Fig. 7) shows that, for the given set of parameters, the EQSCC would help to obtain about 30% more recovery efficiency at its worst point. 94 200 65% Figure 8. Extraction efficiency at the MPP of a two-panel chain, with and without an EQSCC, as a function of the irradiation ratio: solid lines simulation, dashed lines - experiments. 96 0 With EQSCC 97% 75% IN/IS=0.625 IN/IS=0.125 98 η 25 (b) 50 Vo [V] Figure 7. Power output of two serially connected PV panels ,with and without an EQSCC, for insolation ratio IS/IN=0.5: (a) simulation for 1 Sun, (b) experimental. SELECTION OF COMPONENTS VALUES This section outlines the proposed procedure for the selection of the power stage components: Rds(on) of transistors, capacitance and ESR of capacitors and inductor value. Taking into consideration the analysis presented above, soft switching will usually be preferred in practical cases. Like in any other design case, the selection of the components’ values for the soft switched SCC is not definitive but, rather, has some degrees of freedom. We propose to select first the desired switching frequency, fs, taking into consideration the rise and fall times of the switches as well as gate drive losses. Considering the fact that the conduction losses of the soft switched SCC are linearly proportional to the loop resistance, it is obvious that the loop resistance must be as small as possible, This loop resistance, R, comprises the total Rds(on) in the loop plus total ESR of capacitors (including the flying capacitor and bus capacitors). As pointed out above, for Q≥1, and, therefore, 5R≈ Ploss(max) /(I2D(max)), where is the maximal power that the system is allowed to dissipate at the maximal average differential current ID(max). This equation can thus be the basis for the selection of R once a decision has been made regarding the acceptable limit of power loss. In the next step, the value of the inductance is set by assuming the lowest quality factor, Q, that will still ensure soft switching, thi.e. Q1. Since Q= ω0L/R≈2πfsL/R this would lead to the smallest possible inductor, given the fact that the switching frequency and R have already been selected. The inductance of the resonant inductor can then be calculated from L= R/2πfs. Alternatively, if leakage inductance is to be used, its value should be estimated or measured. The leakage inductance must be larger than R/2πfs since otherwise the switching frequency will need to be increased or extra inductance will need to be added in 4133 order to keep Q around 1. Once the value of L has been selected and assuming that the bus capacitors are much larger than the flying capacitor, C is calculated from: ⁄ (12) The values of the bus capacitors that are to be connected in parallel to each PV can be chosen on the basis of the allowable voltage ripple. Assuming a sinusoidal resonant current and neglecting the contribution of the ESR to the voltage ripple, the bus capacitor, CB, can be selected using the relation: ⁄ (13) where Vrpp is the peak to peak voltage ripple. Commercial capacitors (flying, and bus capacitors) need then to be chosen and their ESR evaluated against the set loop resistance R and Vrpp. Obviously, the capacitors’ ESR needs to be smaller than R and the difference will be the allowable total switch resistances, Rds(on), in the loop. Further, the ESR-induced voltage ripple across the bulk capacitors also needs to be smaller than the specified Vrpp across them. If these conditions do not occur, the design needs to be achieved iteratively after adjusting the switching frequency or the allowable power dissipation. If hard switching is considered, the optimal selection of the components’ values is based on the fact that the optimal operating region is PC. This means when the duration of the on time of each subcircuit is about equal to the time constant of the subcircuit, namely, TCR. For a 50% duty cycle operation, 1/2fsCR. In this case Re 4.3R (Fig. 5) for the unity gain SCC. Similar to the case of the soft switched SCC components’ selection procedure, one can also start the design here by first choosing the switching frequency and the allowable power dissipation at the maximal differential current. The value of R can then be calculated from: ⁄ (14) and C from: ⁄ (15) The capacitance of the bus capacitors can be chosen using (13). As in the case of the soft switched procedure given above, design iterations may be required if the ESRs of the available commercial capacitors are too large. VI. EXPERIMENTAL ESQCC CIRCUIT DESIGN A. Power Stage The experimental EQSCC was designed for PV panels of model NU-185W (Sharp) having the following parameters: Pmax = 185W, Voc = 30.2V, Isc = 8.54A, Vmpp = 24V, Impp = 7.71A. The system was designed for a switching frequency of 100kHz, while the parasitic leakage inductance of the experimential system was measured to be 200nH. Following the proposed design procedure, these constraints yield a flying capacitor value of 10uF. After assembly, the running switching frequency was adjusted to the actual switching frequency (105kHz). The loop resistance was set to 200mΩ that is distributed between 2Rds(on)= 38mΩ, ESR of flying capacitor (10mΩ) and ESR of bulk capacitors (100µF each) of 1.5Ω. For this operational mode, the equivalent resistance is estimated, in accordance with (7), to be 0.5Ω per subcircuit or 1Ω for the complete EQSCC. This will yield a power loss of about 25W for a differential current of 5A. The essential power elements in the experimental setup of the EQSCC are shown in Fig. 9. The diagram is divided into three main sections: the switches and flying capacitor, the floating drives interfaces and the low-side drivers. The EQSCC has three voltage buses: GND, connected to PVb(the negative terminal of the lower panel in the series), V+, connected to the PVa- PVb+ junction and V++, connected to PVa+. The EQSCC serves two adjacent panels, which are connected in series, while each is connected in parallel to the bus capacitors. The commutation of the flying capacitor from one panel to the other is accomplished by 4 MOSFET transistors that are driven by the control signals generated by a microcontroller. The drivers receive control signals from IN1-IN4 and 12V from the onboard power supply. The power supply is powered from the V++ Bus. B. The Gate Driving Scheme To simplify the EQSCC design and, in particular, to avoid the use of expensive isolated drivers, the type of power MOSFET transistors was chosen such that the sources of each transistor are connected to a DC bus. That is, Q1 and Q3 were chosen to be N-type MOSETs while Q2 and Q4were selected to be P-type MOSFETS. This made possible the use of series capacitors for DC decoupling between the ground-referred driver and the gates of the floating MOSFETs Q2, Q3 and Q4 (Fig. 9). The full magnitudes of the drivers’ gate control signals were restored by a DC restorer that applies diodes D1, D2, D3 and D4 to clamp the decoupling capacitors to the DC bus potentials during the off periods. The series DC decoupling capacitors, Cbuff, were chosen such that . An extra precaution was taken to equalize the potentials of the floating power MOSFET sources with the drivers’ ground. This was done by connecting additional capacitors, C7-C10 (Fig. 9), between the floating drains and the ground terminals of the drivers. Despite this, the ripple across the bus capacitors will penetrate into the gate drive voltage and precaution must be taken to ensure a high enough noise immunity by performing the following: lowering V rpp, choosing MOSFET transistors with a relatively high gate threshold voltage and providing a large margin between the threshold voltage and the gate drive signal. The EQSCC was controlled by a microcontroller (Microchip dsPIC33FJ16GS502) with a 3.3V power supply that was obtained from a local supply powered from the V++ bus. 4134 V++ To PVa+ SCC SUP65P06-18 Q4 C3 100u SUP65P06-18 SUP60N06-18 SUP60N06-18 C9 C10 2.2u 0.1u U2 C6 C15 OUTB Vs OUTA IN4 INB GND INA IN3 MIC4426 2.2u C16 0.1u R4 C5 3.3 470n R5 10k R3 10k Q2 R2 12V D2 1N5819 D1 1N5819 3.3 C2 100u Drivers 470n DC Restorers C1 10u V+ R6 D3 1N5819 3.3 Q3 To PVb+ & PVa- R7 10k C4 470n C13 OUTB Vs OUTA 2.2u C14 0.1u Q1 U1 C7 C8 2.2u 0.1u INB GND INA IN2 IN1 MIC4426 R1 3.3 To PVbFigure 9. Schematic diagram of the experimental EQSCC module. VII. EXPERIMENTAL RESULTS The experimental results were obtained with one EQSCC that was interfaced with two serially connected PV panels (Sharp NU-185W). The soft switching operation is evident from Fig. 10 that shows the capacitor current for a differential current of 2A. The equivalent resistance of the EQSCC was obtained by measuring ID and (V++)-(V+) and was found to be close to 1Ω, as predicted by the design. The gate drive signals were found to be clean and free of interference even when the EQSCC was passing high current. The power output of two serially connected PV panels, with and without an EQSCC, for insolation ratio IS/IN=0.5 was measured by partially shading one of the panels and changing the load. The shape of the power output as a function of the PV panels’ voltage is similar to the one predicted by the simulation (Fig. 8(b) ). The inclusion of the EQSCC clearly boosted the maximum available power by about 50%. The efficiency at the MPP of a two panel chain, with and without an EQSCC, as a function of the irradiation ratio output (Fig. 5) was measured by progressively blocking the light from one of the panels with dark glass. The experiment shows that in the worst case about 97% of the MPP power is recovered as compared to 65% without the EQSCC. These results match the simulation results, confirming a 50% increase in power output for the worst case situation, when compared to the output of the non equalized case. 4135 Figure 10. Experimental current of the flying capacitor in the EQSCC prototype. ID = 2A, horizontal scale is 2μS/div., vertical scale is 2A/div. [6] VIII. DISCUSSION AND CONCLUSIONS The proposed EQSCC approach explored in this study was found to be effective in overcoming the adverse effects of a shaded panel. Although discussed in connection with one shaded panel, the approach is equally applicable for cases in which a number of panels are shaded. Successful operation of the proposed equalization scheme hinges on the assumption that the voltage at the MPP of all panels, including the shaded panels, is equal. The experiments carried out in this study show that this assumption is valid for the tested PV panels. The experimentally measured losses of the soft switched ESCC were found to be about 6.23W for a 2.63A differential current, which agrees well with the deign objective of the experimental unit. As detailed in section III, the losses can be reduced by lowering the total loop resistance. The major losses in the experimental EQSCC were caused by the ESR of the bus capacitors that had an ESR value of 0.15Ω each. Reduction of these resistances by the use of ceramic capacitors will thus increase the overall efficiency. The proposed EQSCC has a number of advantages over other approaches: the system processes only the differential power, each of the modules is exposed to only two panels, implying low voltage stresses on the switches and local wiring, there is no need for circuit isolation, the control is simple and there is no need for central control or communication to and from the modules. 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