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Dale & Lewis Chapter 5 Computing components Let’s design a computer • Generic CPU with registers − − − − − Program counter (PC) – 5 bits (size of addresses) Instruction register (IR) – 8 bits (op code + address) Memory Address Register (MAR) – 5 bits Main Memory Memory Data Register (MDR) – 8 bits (byte addressable) Accumulator (A or Acc) – 8 bits Instructions • Instruction format: 3-bit op code, 5-bit address • Instructions and their op codes op code Instruction 000 HALT (HLT) 001 LOAD (LDA) 010 STORE (STA) 011 ADD (ADD) 100 SUBTRACT (SUB) 101 BRANCH (BR) 110 BRANCH ON ZERO (BRZ) 111 BRANCH ON POSITIVE (BRP) Types of instructions • Data movement − Move data between memory and CPU − Move data between different memory locations − Input, output • Arithmetic and logic operations − − − − Integer arithmetic Comparing two quantities Shifting or rotating bits in a quantity Testing, comparing and converting bits • Program control − − − − Starting a program Halting a program Skipping to another location Testing data to decide whether to skip to another instruction Instructions • LOAD instruction (LDA) − − − − − PC MAR MDR IR IR [address] MAR MDR A PC + 1 PC • ADD instruction (ADD) − − − − − PC MAR MDR IR IR [address] MAR A + MDR A PC + 1 PC • STORE instruction (STA) − − − − − PC MAR MDR IR A MDR IR [address] MAR PC + 1 PC • HALT instruction (HLT) − PC MAR − MDR IR − stop FETCH – DECODE – GET DATA – EXECUTE FETCH • Address of next instruction is transferred from PC to MAR and the instruction is located in the memory FETCH • Instruction is copied from memory to the MDR DECODE • Decode the instruction EXECUTE • Execute the instruction – control unit sends signals to appropriate devices to carry out execution of the instruction A small computer program op code Assembly language Program LOAD A 00100 00101000 ADD B 00101 01101001 STORE C 00110 01001010 00111 00000000 HLT Data A DATA +5 01000 00000101 B DATA -3 01001 11111101 C DATA 01010 Address Contents Main memory Address Contents 00000 CPU 00001 00010 PC 00011 IR Acc MAR MDR 00100 00101000 00101 01101001 00110 01001010 00111 00000000 01000 00000101 01001 11111101 01010 01011 01100 01101 etc… Address 00000 CPU 00001 PC 00010 00100 00011 IR MAR Acc Contents MDR 00100 00101000 00101 01101001 00110 01001010 00111 00000000 01000 00000101 01001 11111101 01010 01011 01100 01101 etc… The program starts Address 00000 CPU 00001 PC 00010 00100 00011 IR Acc Contents 00100 00101000 00101 01101001 MAR 00110 01001010 00100 00111 00000000 01000 00000101 01001 11111101 MDR 00101000 01010 01011 01100 01101 etc… Fetch 1st instruction Address Contents 00000 CPU 00001 PC 00010 00100 00011 00100 00101000 00101 01101001 IR MAR 00110 01001010 00101000 00100 00111 00000000 01000 00000101 01001 11111101 Acc MDR 00101000 01010 01011 01100 01101 etc… Decode 1st instruction: LOAD A Address Contents 00000 CPU 00001 PC 00010 00100 00011 00100 00101000 00101 01101001 IR MAR 00110 01001010 00101000 01000 00111 00000000 01000 00000101 01001 11111101 Acc MDR 00000101 00000101 01010 01011 01100 01101 etc… Execute1st instruction: LOAD A Address Contents 00000 CPU 00001 PC 00010 00101 00011 00100 00101000 00101 01101001 IR MAR 00110 01001010 00101000 01000 00111 00000000 01000 00000101 01001 11111101 Acc MDR 00000101 00000101 01010 01011 01100 01101 etc… Advance PC Address Contents 00000 CPU 00001 PC 00010 00101 00011 00100 00101000 00101 01101001 IR MAR 00110 01001010 00101000 00101 00111 00000000 01000 00000101 01001 11111101 Acc MDR 00000101 01101001 01010 01011 01100 01101 etc… Fetch 2nd instruction Address Contents 00000 CPU 00001 PC 00010 00101 00011 00100 00101000 00101 01101001 IR MAR 00110 01001010 01101001 00101 00111 00000000 01000 00000101 01001 11111101 Acc MDR 00000101 01101001 01010 01011 01100 01101 etc… Decode 2nd instruction: ADD B Address Contents 00000 CPU 00001 PC 00010 00101 00011 00100 00101000 00101 01101001 IR MAR 00110 01001010 01101001 01001 00111 00000000 01000 00000101 01001 11111101 Acc MDR 100000010 11111101 01010 01011 01100 01101 etc… Execute 2nd instruction: ADD B Address Contents 00000 CPU 00001 PC 00010 00110 00011 00100 00101000 00101 01101001 IR MAR 00110 01001010 01101001 01001 00111 00000000 01000 00000101 01001 11111101 Acc MDR 00000010 11111101 01010 01011 01100 01101 etc… Advance PC, etc…
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