powerplay pro-8 ha8000/pro-xl ha4700
... This user's manual has been written in such a way to enable you an overview over the control elements of the unit and offers at the same time detailed information about possible applications. To facilitate quick look-ups, control elements have been described in groups depending on their function. Sh ...
... This user's manual has been written in such a way to enable you an overview over the control elements of the unit and offers at the same time detailed information about possible applications. To facilitate quick look-ups, control elements have been described in groups depending on their function. Sh ...
MAX5878 16-Bit, 250Msps, High-Dynamic-Performance, Dual DAC with LVDS Inputs General Description
... applications found in wireless base stations and other communications applications. Operating from +3.3V and +1.8V supplies, this dual DAC offers exceptional dynamic performance such as 76dBc spurious-free dynamic range (SFDR) at fOUT = 16MHz and supports update rates of 250Msps, with a power dissip ...
... applications found in wireless base stations and other communications applications. Operating from +3.3V and +1.8V supplies, this dual DAC offers exceptional dynamic performance such as 76dBc spurious-free dynamic range (SFDR) at fOUT = 16MHz and supports update rates of 250Msps, with a power dissip ...
CMP04 数据手册DataSheet 下载
... Low Input Bias Current: 100 nA Max Low Input Offset Current: 10 nA Max ...
... Low Input Bias Current: 100 nA Max Low Input Offset Current: 10 nA Max ...
ADM2209E 数据手册DataSheet 下载
... The ADM2209E is suitable for operation in harsh electrical environments and is compliant with the EU directive on EMC (89/336/EEC). Both the level of emissions and immunity are in compliance. EM immunity includes ESD protection in excess of ± 15 kV on all I-O lines (1000-4-2), Electrical Fast Transi ...
... The ADM2209E is suitable for operation in harsh electrical environments and is compliant with the EU directive on EMC (89/336/EEC). Both the level of emissions and immunity are in compliance. EM immunity includes ESD protection in excess of ± 15 kV on all I-O lines (1000-4-2), Electrical Fast Transi ...
Logic Demo Board Kit Compact, easy-to-use boards for fast, www.nxp.com
... A supply voltage of 1.4 to 4.3 V can be used for the board. Signals in the range of 0 V to VCC can be connected to nZ pins and switched to nY pins or vice versa with minimal loss. The maximum input frequency for each of the two channels can be as high as 60 MHz at a load of 50 Ω. By default, to avoi ...
... A supply voltage of 1.4 to 4.3 V can be used for the board. Signals in the range of 0 V to VCC can be connected to nZ pins and switched to nY pins or vice versa with minimal loss. The maximum input frequency for each of the two channels can be as high as 60 MHz at a load of 50 Ω. By default, to avoi ...
FT7522 Reset Timer with Fixed Delay and Reset Pulse
... LOW for factory testing. The DSR pin MUST be forced to GND during normal operation. The DSR pin should never be driven HIGH or left to float during normal operation. The DSR PIN state should never be changed during device operation; it must be biased prior to supplying the VCC supply. If there is a ...
... LOW for factory testing. The DSR pin MUST be forced to GND during normal operation. The DSR pin should never be driven HIGH or left to float during normal operation. The DSR PIN state should never be changed during device operation; it must be biased prior to supplying the VCC supply. If there is a ...
TBD62783A
... a Bridge Tied Load (BTL) connection-type IC that inputs output DC voltage to a speaker directly. ...
... a Bridge Tied Load (BTL) connection-type IC that inputs output DC voltage to a speaker directly. ...
MAX1214 1.8V, 12-Bit, 210Msps ADC for Broadband Applications General Description
... input is designed for either differential or single-ended operation and can be AC- or DC-coupled. The ADC also features a selectable on-chip divide-by-2 clock circuit, which allows the user to apply clock frequencies as high as 340MHz. This helps to reduce the phase noise of the input clock source. ...
... input is designed for either differential or single-ended operation and can be AC- or DC-coupled. The ADC also features a selectable on-chip divide-by-2 clock circuit, which allows the user to apply clock frequencies as high as 340MHz. This helps to reduce the phase noise of the input clock source. ...
MAX5875 16-Bit, 200Msps, High-Dynamic-Performance, Dual DAC with CMOS Inputs General Description
... that supports a 2mA to 20mA full-scale output current range, and allows a 0.1VP-P to 1VP-P differential output voltage swing. The device features an integrated 1.2V bandgap reference and control amplifier to ensure high-accuracy and low-noise performance. A separate reference input (REFIO) allows fo ...
... that supports a 2mA to 20mA full-scale output current range, and allows a 0.1VP-P to 1VP-P differential output voltage swing. The device features an integrated 1.2V bandgap reference and control amplifier to ensure high-accuracy and low-noise performance. A separate reference input (REFIO) allows fo ...
Dual 64 X 1, Dual 256 X 1 Clocked First-In, First
... (mean) frequency and the mean frequency of the SYS_CLOCK is greater than or equal to the sum of the individual mean input rates. A single-bit FIFO is needed for each additional input data signal that is time-division multiplexed into the composite signal. The FIFO memories provide a buffer to absorb ...
... (mean) frequency and the mean frequency of the SYS_CLOCK is greater than or equal to the sum of the individual mean input rates. A single-bit FIFO is needed for each additional input data signal that is time-division multiplexed into the composite signal. The FIFO memories provide a buffer to absorb ...
Exercise 15_Revision on Transistor(II)
... The graphs show the characteristics for a transistor operating in the common emitter mode. IC is the collector current, IB is the base current and VCE is the potential difference between the collector and emitter. The current gain for this transistor is ...
... The graphs show the characteristics for a transistor operating in the common emitter mode. IC is the collector current, IB is the base current and VCE is the potential difference between the collector and emitter. The current gain for this transistor is ...
Unit 9 PowerPoint Slides
... Recall that power equals current times voltage (P=IV). So a chip’s power dissipation is given by its supply voltage (VCC) times its supply current (ICC). (Note that we don’t use the voltages and currents on input or output pins.) A lower-power device wastes less energy, generates less heat, and cost ...
... Recall that power equals current times voltage (P=IV). So a chip’s power dissipation is given by its supply voltage (VCC) times its supply current (ICC). (Note that we don’t use the voltages and currents on input or output pins.) A lower-power device wastes less energy, generates less heat, and cost ...
MAX14842 6-Channel, Digital Ground-Level Translator General Description Features
... resistors. The drivers are also able to drive both TTL and CMOS logic inputs. ...
... resistors. The drivers are also able to drive both TTL and CMOS logic inputs. ...
MAX3815.pdf
... TMDS Digital Video Equalizer for DVI/HDMI Cables A squelching function can be created by sending the CLKLOS output through an inverter to the OUTON pin. This will squelch the CML outputs whenever the clock signal is removed. A loss-of-signal LED indicator can be incorporated into the circuit as well ...
... TMDS Digital Video Equalizer for DVI/HDMI Cables A squelching function can be created by sending the CLKLOS output through an inverter to the OUTON pin. This will squelch the CML outputs whenever the clock signal is removed. A loss-of-signal LED indicator can be incorporated into the circuit as well ...
Chapter 5 PCM Modulator
... quality of audio. Figure 5-1 is the block diagram of PCM modulation. First of all is the low-pass filter, which is used to remove the noise in the audio signal. After that the audio signal will be sampled to obtain a series of sampling values as shown in figure 5-2. Next, the signal will pass throug ...
... quality of audio. Figure 5-1 is the block diagram of PCM modulation. First of all is the low-pass filter, which is used to remove the noise in the audio signal. After that the audio signal will be sampled to obtain a series of sampling values as shown in figure 5-2. Next, the signal will pass throug ...
UniPi User Manual REV 1.0 MYSH
... 1Wire sensors ...................................................................................................................................... 6 UART ................................................................................................................................................ ...
... 1Wire sensors ...................................................................................................................................... 6 UART ................................................................................................................................................ ...
SCAN921260 X6 1:10 Deserializer with IEEE 1149.1 (JTAG) and at
... Step 1: After applying power to the Deserializer, the outputs are held in Tri-state and the on-chip powersequencing circuitry disables the internal circuits. When Vcc reaches VccOK (2.1V), the PLL in each deserializer begins locking to the local clock (REFCLK). A local on-board oscillator or other s ...
... Step 1: After applying power to the Deserializer, the outputs are held in Tri-state and the on-chip powersequencing circuitry disables the internal circuits. When Vcc reaches VccOK (2.1V), the PLL in each deserializer begins locking to the local clock (REFCLK). A local on-board oscillator or other s ...
Flip-flop (electronics)
In electronics, a flip-flop or latch is a circuit that has two stable states and can be used to store state information. A flip-flop is a bistable multivibrator. The circuit can be made to change state by signals applied to one or more control inputs and will have one or two outputs. It is the basic storage element in sequential logic. Flip-flops and latches are a fundamental building block of digital electronics systems used in computers, communications, and many other types of systems.Flip-flops and latches are used as data storage elements. A flip-flop stores a single bit (binary digit) of data; one of its two states represents a ""one"" and the other represents a ""zero"". Such data storage can be used for storage of state, and such a circuit is described as sequential logic. When used in a finite-state machine, the output and next state depend not only on its current input, but also on its current state (and hence, previous inputs). It can also be used for counting of pulses, and for synchronizing variably-timed input signals to some reference timing signal.Flip-flops can be either simple (transparent or opaque) or clocked (synchronous or edge-triggered). Although the term flip-flop has historically referred generically to both simple and clocked circuits, in modern usage it is common to reserve the term flip-flop exclusively for discussing clocked circuits; the simple ones are commonly called latches.Using this terminology, a latch is level-sensitive, whereas a flip-flop is edge-sensitive. That is, when a latch is enabled it becomes transparent, while a flip flop's output only changes on a single type (positive going or negative going) of clock edge.