Si5345/44/42 - Silicon Labs
... These jitter attenuating clock multipliers combine fourth-generation DSPLL and MultiSynth™ technologies to enable any-frequency clock generation and jitter attenuation for applications requiring the highest level of jitter performance. These devices are programmable via a serial interface with in-ci ...
... These jitter attenuating clock multipliers combine fourth-generation DSPLL and MultiSynth™ technologies to enable any-frequency clock generation and jitter attenuation for applications requiring the highest level of jitter performance. These devices are programmable via a serial interface with in-ci ...
OP37 Low Noise, Precision, High Speed Operational Amplifier
... unnulled 741type sockets; however, if conventional 741 nulling circuitry is in use, it should be modified or removed to ensure correct OP37 operation. OP37 offset voltage may be nulled to zero (or other desired setting) using a potentiometer (see figure 1). ...
... unnulled 741type sockets; however, if conventional 741 nulling circuitry is in use, it should be modified or removed to ensure correct OP37 operation. OP37 offset voltage may be nulled to zero (or other desired setting) using a potentiometer (see figure 1). ...
MADR-009443-000100 Quad Driver for GaAs FET or PIN Diode Switches and Attenuators
... 3. Unused logic inputs must be tied to either GND or VCC. 4. All voltages are relative to GND. 5. VOPT is grounded in most cases when FETs are driven. To improve the intermodulation performance and the 1 dB compression point of GaAs control devices at low frequencies, VOPT can be increased to betwee ...
... 3. Unused logic inputs must be tied to either GND or VCC. 4. All voltages are relative to GND. 5. VOPT is grounded in most cases when FETs are driven. To improve the intermodulation performance and the 1 dB compression point of GaAs control devices at low frequencies, VOPT can be increased to betwee ...
Static Power Reduction Techniques for Asynchronous Circuits
... while retaining state. The tradeoff between these techniques and non-state preserving techniques is that they are not as effective at reducing leakage currents. One technique, Variable Threshold (VTCMOS), varies transistor threshold voltages by biasing the substrate. By enforcing lower threshold vol ...
... while retaining state. The tradeoff between these techniques and non-state preserving techniques is that they are not as effective at reducing leakage currents. One technique, Variable Threshold (VTCMOS), varies transistor threshold voltages by biasing the substrate. By enforcing lower threshold vol ...
High Speed, ESD-Protected, Full-Duplex, ADM2490E i
... (see Figure 21). The driver input signal, which is applied to the TxD pin and referenced to logic ground (GND1), is coupled across an isolation barrier to appear at the transceiver section referenced to isolated ground (GND2). Similarly, the receiver input, which is referenced to isolated ground in ...
... (see Figure 21). The driver input signal, which is applied to the TxD pin and referenced to logic ground (GND1), is coupled across an isolation barrier to appear at the transceiver section referenced to isolated ground (GND2). Similarly, the receiver input, which is referenced to isolated ground in ...
8-Bit, High Bandwidth Multiplying DAC with Serial Interface AD5425
... many other applications. This DAC utilizes a double buffered, 3-wire serial interface that is compatible with SPI®, QSPI™, MICROWIRE™, and most DSP interface standards. An LDAC pin is also provided, which allows simultaneous updates in a multi-DAC configuration. On power-up, the internal shift regis ...
... many other applications. This DAC utilizes a double buffered, 3-wire serial interface that is compatible with SPI®, QSPI™, MICROWIRE™, and most DSP interface standards. An LDAC pin is also provided, which allows simultaneous updates in a multi-DAC configuration. On power-up, the internal shift regis ...
2.5 V/3.0 V High Precision Reference AD780
... 1. The AD780 provides a pin programmable 2.5 V or 3.0 V output from a 4 V to 36 V input. 2. Laser trimming of both initial accuracy and temperature coefficients results in low errors over temperature without the use of external components. The AD780BN has a maximum variation of 0.9 mV from −40°C to ...
... 1. The AD780 provides a pin programmable 2.5 V or 3.0 V output from a 4 V to 36 V input. 2. Laser trimming of both initial accuracy and temperature coefficients results in low errors over temperature without the use of external components. The AD780BN has a maximum variation of 0.9 mV from −40°C to ...
piecal calibrators - Cameron Instruments Inc.
... loop? And did you end up throwing the transmitter away after you fixed the other problem “just in case” the transmitter was faulty? If you find a loop where the transmitter is calibrated correctly but all the readings elsewhere in the loop have a fixed offset this is due to a Zero Shift. This zero s ...
... loop? And did you end up throwing the transmitter away after you fixed the other problem “just in case” the transmitter was faulty? If you find a loop where the transmitter is calibrated correctly but all the readings elsewhere in the loop have a fixed offset this is due to a Zero Shift. This zero s ...
TLC320AD545 数据资料 dataSheet 下载
... Buffer amp analog noninverting output. DT_BUFP can be programmed for 0 dB, –6 dB, –12 dB and –18 dB gain or muted using the control registers. This output is normally fed to the DTTX_INP terminal through an input resistor. DT_BUFP must be left unconnected in single-ended hybrid. ...
... Buffer amp analog noninverting output. DT_BUFP can be programmed for 0 dB, –6 dB, –12 dB and –18 dB gain or muted using the control registers. This output is normally fed to the DTTX_INP terminal through an input resistor. DT_BUFP must be left unconnected in single-ended hybrid. ...
VRM Thesis - bgavinsound.com
... that can be used to compare the performance of different magnetic component designs. The VRM will be used to convert the input voltage (typically 12V) to a lower level which will supply a microprocessor load e.g. the Intel Pentium. The work will include review of VRM circuit topologies for VRM 10.1 ...
... that can be used to compare the performance of different magnetic component designs. The VRM will be used to convert the input voltage (typically 12V) to a lower level which will supply a microprocessor load e.g. the Intel Pentium. The work will include review of VRM circuit topologies for VRM 10.1 ...
LTC2380-24: 24-Bit, 1.5Msps/2Msps, Low Power SAR ADC with
... may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: All voltage values are with respect to ground. Note 3: When these pin voltages are taken below ground or above REF or OVDD, they will b ...
... may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: All voltage values are with respect to ground. Note 3: When these pin voltages are taken below ground or above REF or OVDD, they will b ...
Using multimeter
... The menu is organized in a top-down tree structure with three levels, as schematically shown in the following. ...
... The menu is organized in a top-down tree structure with three levels, as schematically shown in the following. ...
8413S12BI-126 - Integrated Device Technology
... mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal equilibrium has been reached under these conditions. For additional information, refer to the PCI Express Application Note section in the datasheet. NOTE 1: Peak-to-Pe ...
... mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal equilibrium has been reached under these conditions. For additional information, refer to the PCI Express Application Note section in the datasheet. NOTE 1: Peak-to-Pe ...
Current Digital to Analog Converter
... In production the IDAC is calibrated at room temperature. If the temperature where the MCU is used in varies from this, the calibration value might be off. This software example uses the ADC to measure the current sent through an external resistor connected to ADC channel pin, see Figure 3.1 (p. 6) ...
... In production the IDAC is calibrated at room temperature. If the temperature where the MCU is used in varies from this, the calibration value might be off. This software example uses the ADC to measure the current sent through an external resistor connected to ADC channel pin, see Figure 3.1 (p. 6) ...
50V 3A Power Module
... Power Ground. PGND is the return path for the buck converter power stage. The PGND pin connects to the sources of low-side N-Channel external MOSFET, the negative terminals of input capacitors, and the negative terminals of output capacitors. The return path for the power ground should be as small a ...
... Power Ground. PGND is the return path for the buck converter power stage. The PGND pin connects to the sources of low-side N-Channel external MOSFET, the negative terminals of input capacitors, and the negative terminals of output capacitors. The return path for the power ground should be as small a ...