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Institutionen för systemteknik
Institutionen för systemteknik

... Wireless sensor networks (WSN) play an important role in today’s monitoring and control systems like environmental monitoring, military surveillance, industrial sensing and control, smart home systems and tracking systems. As the application of WSN grows by leaps and bounds, there is an increasing d ...
NC7WV16 TinyLogic ULP-A Dual Buffer 
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... The NC7WV16 is a dual buffer from Fairchild’s Ultra Low Power-A (ULP-A) series of TinyLogic. ULP-A is ideal for applications that require extreme high speed, high drive and low power. This product is designed for a wide low voltage operating range (0.9V to 3.6V VCC ) and applications that require m ...
NC7SV11 TinyLogic ULP-A 3-Input AND Gate 
NC7SV11 TinyLogic ULP-A 3-Input AND Gate 

... Features ...
MAX6746–MAX6753 µP Reset Circuits with Capacitor-Adjustable Reset/Watchdog Timeout Delay General Description
MAX6746–MAX6753 µP Reset Circuits with Capacitor-Adjustable Reset/Watchdog Timeout Delay General Description

... Many µP-based products require manual reset capability, to allow an operator or external logic circuitry to initiate a reset. The manual reset input (MR) can connect directly to a switch without an external pullup resistor or debouncing network. MR is internally pulled up to VCC and, therefore, can ...
POCSAG RADIO PAGER LX2 plus / LX2 advanced LX4
POCSAG RADIO PAGER LX2 plus / LX2 advanced LX4

... Antenna, LNA and Mixer A tuned single loop antenna is used to receive RF signals. The loop and capacitors C112, C185, C111 and the trimming capacitor C110 form a resonance parallel circuit. CR102 is a protecting diode at the LNA input. The RF amplifier is biased via R122 and its output is connected ...
MAX6381–MAX6390 SC70/µDFN, Single/Dual Low-Voltage, Low-Power µP Reset Circuits General Description
MAX6381–MAX6390 SC70/µDFN, Single/Dual Low-Voltage, Low-Power µP Reset Circuits General Description

... thresholds, the reset output asserts and remains asserted for a minimum reset timeout period after VCC rises above the reset threshold. Reset thresholds are available from +1.58V to +4.63V, in approximately 100mV increments. Seven minimum reset timeout delays ranging from 1ms to 1200ms are available ...
Phasors - Electrical and Computer Engineering
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... – that you acknowledge my work, and – that you alert me of any mistakes which I made or changes which you make, and allow me the option of incorporating such changes (with an acknowledgment) in my set of slides ...
MAX6301–MAX6304 +5V, Low-Power µP Supervisory Circuits with Adjustable Reset/Watchdog _______________General Description
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... The reset output is typically connected to the reset input of a µP. A µP’s reset input starts or restarts the µP in a known state. The MAX6301–MAX6304 µP supervisory circuits provide the reset logic to prevent code-execution errors during power-up, power-down, and brownout conditions (see the Typica ...
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... The MAX6832/MAX6835/MAX6838 have a push-pull active-low reset output (RESET). The MAX6833/ MAX6836/MAX6839 have a push-pull active-high reset output (RESET) and the MAX6834/MAX6837/MAX6840 have an open-drain active-low reset output (RESET). The open-drain active-low reset output requires a pullup re ...
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... The MAX16124/MAX16125 have one manual reset input (MR), a reset output (RESET), and a soft reset output (SRESET) which mirrors the state of the input. The MAX16122/MAX16123 have two identical manual reset inputs (MR1 and MR2) and one reset output (RESET). A deglitch block is connected to each input ...
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... Figure 4b or Figure 4c. RESET typically remains valid for VCC down to 2.5V; RESET is guaranteed to be valid with VCC down to 1V. Calculate the values for the resistor voltage divider in Figure 4b using the following equations: 1) R3 = (1.30 x VCC MAX)/(VLOW LINE x IMAX) 2) R2 = [(1.30 x VCC MAX)/(VR ...


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... stored in the device and is used to set watchdog timeout. If RESET goes low before sampling is finished, the device interrupts sampling, and sampling is restarted when RESET goes high again. If the external SWT capacitor is less than 470pF, the sampling result sets the watchdog timeout to zero. This ...
CD4528BC Dual Monostable Multivibrator
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... Optimal binary communication, in the sense of minimizing symbol error rate, with nonequal probabilities has been derived in [1] under various signalling configurations for the single-user case with a given average energy E. This work extends a subset of the results in [1] to a two-user orthogonal mu ...
Question Bank on Networks - Prof. Ch. Ganapathy Reddy
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... with in the terminal  Power absorbed by voltage source is positive if current flows from positive to negative with in the terminal  When frequency of the sources are same either DC or AC use superposition theorem to find current and voltage but not power. However when AC sources are there it takes ...
CMOS Analog Design Lecture Notes Rev 1.5L_02_06_11
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Chapter 8 : Machine maintenance
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... (a) Check that the screws for the DC link connection cable (bar) are tight. (b) If a DC link low voltage alarm condition occurs in more than one module, see Subsection 3.1.4, "Alarm code 4" for explanations about how to troubleshoot the power supply module. (c) If a DC link low voltage alarm conditi ...
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Radio transmitter design

A radio transmitter is an electronic device which, when connected to an antenna, produces an electromagnetic signal such as in radio and television broadcasting, two way communications or radar. Heating devices, such as a microwave oven, although of similar design, are not usually called transmitters, in that they use the electromagnetic energy locally rather than transmitting it to another location.
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