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FUNDAMENTALS OF
DESIGN FOR RELIABILITY
Chapter Objectives
Introduce the need for design for reliability
List the main causes of reliability failures
How do failures relate to their mechanisms
Describe each failure
Propose design guidelines against the failure
Microsystems Packaging
Introduction
Electronic Product:
• Performance
• Cost
• Size
• Reliability
Electrical:
• Performance
• Size
Manufacturing:
• Cost
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• Reliability
Reliability
Often not designed up-front.
Tested during the product qualification or after
the product is manufactured.
Expensive and time-consuming approach.
Design for RELIABILITY as well !!!
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5.1 What is Design for Reliability
Product performs the functions – reliable product
“Long-term” reliability (i.e. Automobile, Personal Computer)
Economically not viable to test “long-term” reliable products for
several years before they are sold out.
To ensure over an extended period of time, two approaches can be
taken:
Design the systems packaging up-front for reliability.
1.
2.
Conduct an accelerated test on the systems packaging for reliability
after the system is designed, fabricated & assembled.
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1. Design the systems packaging up-front for reliability
Predetermine various potential failure
mechanisms
Create and select materials and processes –
minimize/eliminate the chances for the failures
“up-front” design
Design for reliability
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2. Conduct an accelerated test on the systems
packaging for reliability after the system is
designed, fabricated & assembled
After a system is built and assembled, system
accelerated to test conditions.
Temperature
Testing for reliability – Chapter 22
,humidity
,voltage ,pressure
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Comparison and usage
Industrial practice uses Testing for Reliability
If {problems = TRUE}
Then (IC & system-level packages):
RE[designed, fabricated, assembled, tested]
Expensive and time consuming
Design for Reliability = Solution
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5.2 Microsystems Failures and Failure Mechanisms
High-level symptoms (i.e. computer, TV)
Underlying cause (i.e. chip, corrosion, moisture,
electrostatic discharge) – PRODUCT NOT RELIABLE
Design for Reliability understands, identifies, and
prevents such failures
Mechanisms – stress exceeds the
strength or capacity of the component and causes the
system failure. (single event)
Overstress
Mechanisms – gradual and occurs even at
lower stress level. (repeated event)
Wearout
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Failure mechanisms is microelectronic system packages
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5.3 Fundamentals of Design for Reliability
Important to understand the failure (why, where, how
long, application, etc.)
Two methods for design against failure:
1.
2.
By reducing the stress that cause the failure.
By increasing the strength of the component.
Either one can be achieved by:
Selecting materials
Changing the package geometry
Changing the dimensions
Protection
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5.4.1 What are Thermomechanically-induced Failures ?
- Caused by stresses and strains
generated within electrical package
due to thermal loading.
- Due to CTE (coefficient of thermal
expansion), thermally-induced
stresses are generated in various
parts of system.
- Figure - Illustration of thermo
mechanical deformation in
solder joints
- αb BOARD
- αc COMPONENT
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Tmax
chip carrier αc(Tmax – T0) per unit length
board
αb(Tmax – T0) per unit length
- Difference between the two expansions = net shearing displacement:
L(αb - αc)(Tmax – T0)
where L – distance (of the solder joint) from the neutral point (DNP)
Tmin
chip carrier αc (Tmin – T0) per unit length
board
αb(Tmin – T0) per unit length
- Net shearing displacement:
L(αb - αc)(Tmin – T0)
- Difference in the displacement at Tmax and T min:
Δ = L(αb - αc)(Tmax – T0)
- Shear strain:
γ = Δ / h = (L / h)(αb - αc)(Tmax – Tmin)
where h – height of solder joint
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5.4.2 What is Fatigue?
Fatigue is the most common mechanism of failure and responsible
for 90% of all structural and electrical failures.
Occurs in metals, polymers, and ceramics.
Metal paper clip example
Bend in both directions
Repeat the process
Breaks at lower load
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5.4.3 Definitions Relating to Fatigue Fracture
Two approaches in determining the number of cycles to fatigue
failure:
1.
High-cycle fatigue – based on stress reversals to determine the
number of cycles to fatigue failure.
2.
Low-cycle fatigue – based on strain reversals and is used for
situations where the material has plastic deformation.
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Typical Fatigue Load Cycle
Stress vs. time, max & min, ΔS, Sa
Fatigue cycle – successive maxima/minima in load or stress
The number of fatigue cycles to failure designed by Nf
The number of fatigue cycles per second – cyclic frequency
The average of the max and min stress – mean stress, Smean
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5.4.4 Predictive Fatigue Models
Used fatigue models for solder joints fall into following
categories:
(1)
Coffin-Manson-type fatigue model
Strain-energy-based fatigue model
Fracture-mechanics-based fatigue model
Continuum damage mechanics-based model
(2)
(3)
(4)
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Coffin-Manson Low-Cycle fatigue model
Predict low-cycle fatigue life, Nf, of metallic materials in terms of the
plastic strain range:
Where m and C are constants and is 1/2 of the plastic strain
accumulated over one fatigue cycle.
Solder joint fatigue applications, the fatigue can be expressed with
respect to inelastic shear strain range:
Where Nf - cycles to failure (fatigue life)
- fatigue ductility coefficient
c - fatigue ductility exponent
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Solomon’s Model
Determined low-cycle fatigue expressions for Pb-Sn (Lead-Tin)
solder joints for temperatures at [-50, 35, 125, 150] degree C.
Average values: θ = 1.14 and α = 0.51
In the table are given constants for θ and α
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Engelmaier’s Model
Based on Coffin-Manson model
The frequency-modified low-cycle fatigue model
Where
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Design Guidelines to Reduce Early Fatigue Failure
The strain increases with the CTE mismatch between the chip
carrier and the substrate. Use CTE close to the effective CTE of the
chip carrier.
The strain increases with distance from the neutral point. Design
distance from the neutral point as small as possible.
The strain in the solder interconnects increases with temperature.
Design thermal paths such that the heat is easily dissipated, so that
high thermal gradients do not exist.
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5.4.6 Design Against Brittle Fracture
Brittle fracture is an overstress failure mechanism that occurs rapidly
with little or no warning when the induced stress in the component
exceeds the fraction strength of the material.
Occurs in brittle materials (ceramics, glasses and silicon).
Applied stress and work could break the atomic bonds.
Where
is the fracture strength and E is the modulus of elasticity of
the material.
Flaw Modeled as an Edge Crack
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5.4.7 Design Guidelines to Reduce Brittle
Fracture
Designs with materials and processing conditions that
would produce the least stress in brittle materials should
be created.
The brittle material should be polished to remove surface
flaws to enhance reliability.
5.4.8 Design Against Creep-Induced Failure
What is Creep?
A time-dependent deformation process under load.
Thermally-activated process: the rate of deformation
for a given stress level increases significantly with
temperature.
Deformation depends on both
1. The applied load.
2. The duration through which the load is applied.
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5.4.8 Design Against Creep-Induced Failure
Creep can occur at any stress level.
Creep is most important at elevated
temperatures.
Homologous temperature:
The
ratio of the operating temperature to the melting
point of the material in absolute scale.
If homologous temperature is above 0.5, creep will be
a problem.
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Creep Example
Creep fatigue failure in a lead/tin solder circuit board connection
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5.4.8 Design Against Creep-Induced Failure
Creep Strain Curve
Arrhenius creep equation:
Creep Strain Rate = A(σn)e-(Q/RT)
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Design Guidelines to Reduce CreepInduced Failure.
Use materials with high melting point if the
application calls for harsh temperature
conditions.
Reduction of mechanical stress will reduce
creep deformation.
Creep is a time controlled phenomenon.
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5.4.9 Design Against Delamination-Induced
Failure
What is delamination?
The
debonding or the separation of adjacent material
layers which were bonded before.
Two Categories
Embedded:
delamination occurs in the interior of the
package.
Free Edge: delamination occurs at an edge of the
package.
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Delamination Example
Delamination in the circuit board assembly
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5.4.9 Design Against DelaminationInduced Failure
Causes of Delamination
Processing
Issues
Inadequate surface preparation, presence of
contaminants, moisture, inadequate baking,
inadequate material dispensing.
High
Interfacial Stresses
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Design Guidelines to Reduce Delamination
Failure
Careful selection of processing conditions.
Reduce the mismatch in engineering properties between
adjacent materials.
Improve adhesion properties between different material
layers.
The geometry of the package should minimize sharp
corners.
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5.4.10 Design Against Plastic Deformation
What is Plastic Deformation?
When
the applied mechanical stress exceeds the
elastic limit or yield point of a material.
It is permanent.
Excessive deformation and continued
accumulation of plastic strain due to cyclic
loading will eventually lead to cracking of the
component and make it unusable.
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Design Guidelines Against Plastic
Deformation
Limit the design stresses in the packaging
structure below the yield strength of the
materials used. If possible, use materials that
have high yield strength.
Design and control the local plastic deformation
at regions of stress concentrations.
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5.5 Electrically Induced Failures
What are Electrically Induced Failures?
Failures
Three
caused as a result of electrical overstress.
Types
Electrostatic Discharge
Gate Oxide Breakdown
Electromigration
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5.5.2 Design Against Electrostatic Discharge
What is ESD?
The
transfer of electrostatic charge between bodies at
different potentials caused by direct contact or
induced by an electrostatic field.
Two
Types of Failure
Immediate Failure
Delayed Failure
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Guidelines against ESD
Workstations can be provided with measures like conductive
tablemats, wristbands, and conductive flooring.
Air ionizers neutralize static charges on nonconductive materials
used in manufacture.
All test and soldering equipment should be provided with ground
potential and should be checked periodically.
Antistatic foams can be used for protecting ESD sensitive devices
for storage and transportation.
Monitoring devices such as field meters can be used to measure
and control static charge on materials.
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5.5.3 Design Against Gate Oxide
Breakdown
What is Oxide Breakdown?
An
electrical short between
the metallization and the
semiconductor disabling the
functionality of a MOSFET.
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5.5.3 Design Against Gate Oxide
Breakdown
Causes of Oxide Breakdown
Process
induced defects or particles.
Accidental discharge of voltage.
The risk of dielectric breakdown generally
increases with the area of the oxide layer, since
a larger area means the presence of more
defects and greater exposure to contaminants.
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5.5.4 Design Against Electromigration
What is Electromigration?
Atom
flux induced in metal traces by high
current densities.
Metal atoms (such as solders) experience a
mechanical force and get dislodged from their
position.
This results in the formation of metal voids in
the conductor, which eventually result in
electrical opens.
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Electromigration Example
Before
After
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Design Guidelines Against Electromigration
Electromigration has been mostly noticed in
aluminum and silver metallization. Copper traces
are more resistant.
Use shorter traces. Tradeoff is more routing
layers and greater complexity during fabrication.
Tightly enforce current density design rules
based on electromigration data.
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5.6 Chemically Induced Failures
What are Chemically Induced Failures?
Chemical
process such as electrochemical
reactions can result in cracking of vias, traces,
or interconnects leading to electrical failures.
Two Types
Corrosion
Intermetallic Diffusion
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5.6.2 Design Against Corrosion-Induced
Failure
What is Chemical Corrosion?
The
chemical or electrochemical
reaction between a material,
usually a metal, and its
environment that produces a
deterioration of the material and
its properties.
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Design Guidelines to Reduce Corrosion
Metals with a high oxidation potential tend to
corrode faster.
Use hermetic packages to prevent moisture
absorption.
Ensure there are no trapped moisture or
contaminants during the processing an
assembly of the packages.
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5.6.3 Design Against Intermetallic Diffusion
What is Intermetallic Diffusion?
During
wirebonding and solder reflow, the
joining process generates intermetallic layers
which are byproducts of the joining process.
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Design Guidelines Against Intermetallic
Diffusion
Limit the process temperatures and control
the time exposed to high temperatures
during the joining process.
Control the temperature range and cycles
of exposure at the high temperature
period.
Application of nickel/gold coating on the
bare copper pad surfaces.
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