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Transcript
KUAS
Company name
HPDS
A Realistic Variable Voltage Scheduling
Model for Real-Time Applications
ICCAD Proceedings of the 2002 IEEE/ACM international conference
Reporter: Fu-Jiun Lu
2010-05-14
Abstract
Hpds Lab
Voltage scheduling is indispensable for
exploiting the benefit of variable voltage
processors. Though extensive research has been
done in this area, current processor limitations
such as transition overhead and voltage level
discretization are often considered insignificant
and are typically ignored. We show that for hard,
real-time applications, disregarding such details
can lead to sub-optimal or even invalid results.
2
Outline
Hpds Lab
Introduction
 Preliminaries
 Basic Algorithm
 Improved Algorithm
 Experimental Results

–
–

Randomly generated job sets
CNC & Avionics
Summary
3
Introduction
Hpds Lab


The demands for mobile and pervasive computing
devices have made low power computing a critical
technology. One of the most effective ways of
reducing energy is so called Dynamic Voltage
Scaling(DVS).
To effectively exploit the benefit provided by a
variable voltage processor, careful selection of
voltage levels and frequencies, often referred to
as voltage scheduling, is crucial.
4
Introduction (Cont.)
Hpds Lab
While substantial research to utilize this emerging
technology, often there is a sizeable gap between
the simulated environment and an actual, tangible
implementation.
 One such detail is voltage transition overhead

–

the time and energy overhead incurred whenever a voltage
transition takes place.
Another detail is the discrete voltage levels
–
some variable voltage processors provide only a limited
number of voltage levels.
5
Preliminaries
Hpds Lab
 A set of jobs : J={J1,…,Jn}
 Release times : ri
 Deadline : di
(a) An example set of jobs.
 Worst case execution cycles : ci
 transition interval : △t
 variable transition energy overhead :
△E
(b) Optimal voltage schedule with LPEDF
6
Preliminaries (Cont.)
Hpds Lab
 But S3’s speed has surpassed the normalized maximum
of 1, so the required speed is unachievable.
 Second, J3 will miss its deadline even if the speed of 1.5
is possible.
From Fig.1(b) modified by inserting transition overhead.
7
Basic Algorithm
Hpds Lab

To integrate the voltage transition timing overhead
into LPEDF
–
–

to extend the critical interval to accommodate
the timing overhead.
adjust its speed.
We propose the modification to LPEDF as follows:
Instead of compressing just the critical interval, down
to a single time point, we compress the interval and
adjust the job sets accordingly.
Fig.3: The voltage schedule obtained by simple
modification of LPEDF.
8
Basic Algorithm (Cont.)
Hpds Lab
We will refer to this problem as monotonicity
violation.
 Monotonicity violation occurs when less time is
available to execute the instructions in jobs that
overlap a transition interval.

Fig.4: Job arrangements about the interval Ti squeezed
down into a single time point ti.
Improved Algorithm
Hpds Lab

We improve the energy efficiency of Algorithm 1 and
incorporate transition energy overhead and discrete
voltage levels into considerations. Unnecessary energy
may be wasted when using Algorithm 1.

To prevent any deadlines from being missed, we next
introduce the concept of the latest start time for a job
set and an important lemma on how to compute it.

tLS : the latest time at set of jobs J can begin execution at
speed s* and still meet all deadlines in J .
10
Improved Algorithm (Cont.)
Hpds Lab

Lemma 1 helps us to find the latest start time for
these jobs. Then, with a simple simulation of the
execution, we can find the finish time for these jobs.

Therefore, after a critical interval is identified in
Algorithm 1, its speed is increased to the immediately
higher available voltage level. Again, we can use
Lemma 1 to find the minimal necessary interval with
the given voltage.
11
Experimental Results
Hpds Lab
Use the randomly generated job sets and real-world
examples.
 Applied the Algorithm 1 and the improved algorithm

overhead ranging from 0% to 100% of the average deadline
of the jobs.
– for a processor with 5 discrete levels as with the AMD
processor, and a processor with 14 discrete levels as with
the SA-1100 system.
–

Current experiments do not include energy overhead.
12
Randomly generated job sets
Hpds Lab
For the processor with 5 available voltage levels, improved
algorithm can save nearly 50% of the energy compared with
Algorithm 1 when the transition timing overhead is around 50%
of the job deadline.
13
CNC & Avionics
Hpds Lab
The maximal energy saving can be as high
as 17% for CNC example and 82.5% for
Avionics example.
The energy consumption grows rapidly
with the longer transition overhead
and fewer available voltage levels.
Energy consumption for CNC.
Energy consumption for Avionics.
14
Summary
Hpds Lab
We have shown through examples and
analysis that limitations such as transition
overhead or discrete voltage levels can cause a
theoretically optimal schedule to become invalid if
not correctly accounted for during the scheduling
process. Currently the optimality of our
algorithms is not guaranteed, so further algorithm
development may improve results even more.
15