Download Assembler

Machine-Level Programming I: Basics
Comp 21000: Introduction to Computer Organization & Systems
Spring 2015
Instructor:
John Barr
* Modified slides from the book “Computer Systems: a Programmer’s Perspective”, Randy Bryant &
David O’Hallaron, 2011
1
Today: Machine Programming I: Basics




History of Intel processors and architectures
C, assembly, machine code
Assembly Basics: Registers, operands, move
Intro to x86-64
Real programmers can write assembly code in any language.
-- Larry Wall
2
Intel x86 Processors

Totally dominate laptop/desktop/server market
 but not the phone/tablet market (that’s ARM)

Evolutionary design
 Backwards compatible up until 8086, introduced in 1978
 Added more features as time goes on

Complex instruction set computer (CISC)
 Many different instructions with many different formats
But, only small subset encountered with Linux programs
 Hard to match performance of Reduced Instruction Set Computers
(RISC)
 But, Intel has done just that!
 In terms of speed. Less so for low power.

3
Intel x86 Evolution: Milestones
Name
 8086
Date
1978
Transistors
29K
MHz
5-10
 First 16-bit Intel processor. Basis for IBM PC & DOS
 1MB address space

386
1985
275K
16-33
 First 32 bit Intel processor , referred to as IA32
 Added “flat addressing”, capable of running Unix

Pentium 4E
2004
125M
2800-3800
 First 64-bit Intel x86 processor, referred to as x86-64

Core 2
2006
291M
1060-3500
731M
1700-3900
 First multi-core Intel processor

Core i7
2008
 Four cores (our shark machines)
4
Intel x86 Processors, cont.

Machine Evolution









386
Pentium
Pentium/MMX
PentiumPro
Pentium III
Pentium 4
Core 2 Duo
Core i7
1985
1993
1997
1995
1999
2001
2006
2008
0.3M
3.1M
4.5M
6.5M
8.2M
42M
291M
731M
Added Features




Instructions to support multimedia operations
Instructions to enable more efficient conditional operations
Transition from 32 bits to 64 bits
More cores
5
Intel x86 Processors: Overview
Architectures
X86-16
Processors
8086
286
X86-32/IA32
MMX
386
486
Pentium
Pentium MMX
SSE
Pentium III
SSE2
Pentium 4
SSE3
Pentium 4E
X86-64 / EM64t
Pentium 4F
SSE4
Core 2 Duo
Core i7
time
IA: often redefined as latest Intel architecture
6
2015 State of the Art
 Core i7 Broadwell 2015

Desktop Model





4 cores
Integrated graphics
3.3-3.8 GHz
65W
Server Model




8 cores
Integrated I/O
2-2.6 GHz
45W
7
More Information


Intel processors (Wikipedia)
Intel microarchitectures
8
x86 Clones: Advanced Micro Devices
(AMD)

Historically
 AMD has followed just behind Intel
 A little bit slower, a lot cheaper

Then
 Recruited top circuit designers from Digital Equipment Corp. and
other downward trending companies
 Built Opteron: tough competitor to Pentium 4
 Developed x86-64, their own extension to 64 bits

Recent Years
 Intel got its act together
Leads the world in semiconductor technology
 AMD has fallen behind
 Relies on external semiconductor manufacturer

9
Intel’s 64-Bit History

2001: Intel Attempts Radical Shift from IA32 to IA64
 Totally different architecture (Itanium)
 Executes IA32 code only as legacy
 Performance disappointing

2003: AMD Steps in with Evolutionary Solution
 x86-64 (now called “AMD64”)

Intel Felt Obligated to Focus on IA64
 Hard to admit mistake or that AMD is better

2004: Intel Announces EM64T extension to IA32
 Extended Memory 64-bit Technology
 Almost identical to x86-64!

All but low-end x86 processors support x86-64
 But, lots of code still runs in 32-bit mode
10
Our Coverage

IA32
 The traditional x86

x86-64/EM64T
 The standard
 arda> gcc hello.c
 arda> gcc –march=x86-64 hello.c

Presentation
This forces the compiler to produce 64-bit code
 Book covers x86-64
 Web aside on IA32
 We will only cover x86-64
11
Today: Machine Programming I: Basics




History of Intel processors and architectures
C, assembly, machine code
Assembly Basics: Registers, operands, move
Intro to x86-64
12
Definitions

Architecture: (also ISA: instruction set architecture) The
parts of a processor design that one needs to understand
or write assembly/machine code.
 Examples: instruction set specification, registers.

Microarchitecture: Implementation of the architecture.
 Examples: cache sizes and core frequency.

Code Forms:
 Machine Code: The byte-level programs that a processor executes
 Assembly Code: A text representation of machine code

Example ISAs:
 Intel: x86, IA32, Itanium, x86-64
 ARM: Used in almost all mobile phones
13
Assembly Programmer’s View
Memory
CPU
Addresses
PC
Registers
Condition
Codes
Data
Instructions
Object Code
Program Data
OS Data
Stack

Programmer-Visible State
 PC: Program counter


Address of next instruction
“RIP” (x86-64)
 Register file

Heavily used program data
 Condition codes


Store status information about most recent
arithmetic operation
Used for conditional branching
 Memory
Byte addressable array
 Code, user data
 Stack to support procedures

14
Program’s View: memory
0xC0000000
Kernel virtual memory
User stack
(created at runtime)
Variables in
functions go here
0x40000000
%esp (stack pointer)
Memory mapped region for
shared libraries
brk
Variables in main()
go here
Machine
instructions and
constants go here
Memory
invisible to
user code
Run-time heap
(created at runtime by malloc)
Read/write segment
(.data, .bss)
0x08048000
Read0nly segment
(.init, .text, .rodata)
NOTE:
MEMORY
GROWS UP; 0
IS AT BOTTOM!
Loaded from the
executable file
0 Unused
.data = global and static variables; .bss = global variables initialized to 0; .text = code; .rodata = constants (read only)
15
CPU’s View: fetch, decode, execute
CPU
0xc0000000
E
I
P
User stack
(created at runtime)
Registers
Condition
Codes
Kernel virtual memory
0x40000000
Memory
invisible to
user code
%esp (stack pointer)
Memory mapped region for
shared libraries
brk
Run-time heap
(created at runtime by malloc)
1.
Read/write segment
(.data, .bss)
Fetch instruction from
memory (%eip contains the
address in memory)
0x08048000
Increment %eip to next
instruction address
Read-only segment
(.init, .text, .rodata)
Loaded from the
executable file
0 Unused
16
CPU’s View
CPU
0xc0000000
E
I
P
User stack
(created at runtime)
Registers
Condition
Codes
Kernel virtual memory
0x40000000
Memory
invisible to
user code
%esp (stack pointer)
Memory mapped region for
shared libraries
brk
Run-time heap
(created at runtime by malloc)
2. Decode instruction and
fetch arguments from
memory (if necessary)
Operand could come from
R/W segment, heap or user
stack
Read/write segment
(.data, .bss)
0x08048000
Read-only segment
(.init, .text, .rodata)
Loaded from the
executable file
0 Unused
17
CPU’s View
CPU
0xc0000000
E
I
P
User stack
(created at runtime)
Registers
Condition
Codes
Kernel virtual memory
0x40000000
Memory
invisible to
user code
%esp (stack pointer)
Memory mapped region for
shared libraries
brk
Run-time heap
(created at runtime by malloc)
3. Execute instruction and
store results
Read/write segment
(.data, .bss)
Operand could go to R/W
segment, heap or user stack
0x08048000
Read-only segment
(.init, .text, .rodata)
Loaded from the
executable file
0 Unused
18
CPU’s View
CPU
0xc0000000
E
I
P
Registers
Condition
Codes
0x40000000
Kernel virtual memory
User stack
(created at runtime)
Memory
invisible to
user code
%esp (stack pointer)
Memory mapped region for
shared libraries
brk
Run-time heap
(created at runtime by malloc)
1. Repeat: Fetch next
instruction from memory
(%eip contains the addess in
memory)
Read/write segment
(.data, .bss)
0x08048000
Read-only segment
(.init, .text, .rodata)
Loaded from the
executable file
0 Unused
19
Example

See:
http://courses.cs.vt.edu/csonline/MachineArchitecture/Lessons/CPU/ind
ex.html
Much simpler than the IA32
architecture.
Does not make the register
file explicit.
Uses an accumulator (not in
IA32).
20
Turning C into Object Code
 Code in files p1.c p2.c
 Compile with command: gcc -march=x86-64 –O0 p1.c p2.c -o p
Use basic optimizations (-O0) [-O0 means no optimization]
 Put resulting binary in file p
compile to 64bit code (-march=x8664)
text
C program (p1.c p2.c)

text
Compiler (gcc –O0 -march=x86-64
-S) (-S means stop after compiling)
Asm program (p1.s p2.s)
Assembler (gcc or as)
binary
Object program (p1.o p2.o)
Linker (gcc or ld)
binary
Static libraries
(.a)
Executable program (p)
21
Compiling Into Assembly
C Code (sum.c)
long plus(long x, long y);
void sumstore(long x, long y,
long *dest)
{
long t = plus(x, y);
*dest = t;
}
Generated x86-64 Assembly
sumstore:
pushq
movq
call
movq
popq
ret
%rbx
%rdx, %rbx
plus
%rax, (%rbx)
%rbx
Some compilers use instruction “leave”
Obtain (on arda machine) with command
gcc –O0 –S -march=x86-64 sum.c
Produces file sum.s
Use the –Og flag (dash uppercase ‘O’
number 0) to eliminate optimization.
Otherwise you’ll get strange register
moving.
Warning: Will get very different results on non-Ada machines (Other Linux,
Mac OS-X, …) due to different versions of gcc and different compiler settings.
22
Compiling Into Assembly
C Code (sum.c)
long plus(long x, long y);
void sumstore(long x, long y,
long *dest)
{
long t = plus(x, y);
*dest = t;
}
Generated x86-64 Assembly
sumstore:
pushq
movq
call
movq
popq
ret
%rbx
%rdx, %rbx
plus
%rax, (%rbx)
%rbx
Some compilers use instruction “leave”
Obtain (on arda machine) with command
gcc –O0 –g -march=x86-64 sum.c
-g puts in hooks for gdb
-march=x86-64 compiles code for 64-bit
instruction set
23
gdb

run with executable file a.out
 gdb a.out

quit
 quit

running
 run
 stop
Reference: http://www.yolinux.com/TUTORIALS/GDB-Commands.html
24
gdb

examine source code:
 list firstLineNum, secondLineNum
 where firstLineNum is the first line number of the code that you want to
examine secondLineNum is the ending line number of the code.

break points
 break lineNum
 lineNum is the line number of the statement that you want to break at.

debugging




step
stepi
next
where
//
//
//
//
step one C instruction (steps into)
step one assembly instruction
steps one C instruction (steps over)
info about where execution is stopped
25
gdb

Viewing data






print x
This prints the value currently stored in the variable x.
print &x
This prints the memory address of the variable x.
display x
This command will print the value of variable x every time the program stops.
26
gdb

Getting low level info about the program
 info line lineNum
This command provides some information about line number lineNum including
the memory address (in hex) where it is stored in RAM.
 disassem memAddress1 memAddress2
prints the assembly language instructions located in memory between
memAddress1 and memAddress2.
 x memAddress
This command prints the contents of the memAdress in hexadecimal notation. You
can use this command to examine the contents of a piece of data.
There are many more commands that you can use in gdb. While
running you can type help to get a list of commands.
27
Assembly Characteristics: Data Types

“Integer” data of 1, 2, 4 or 8 bytes
 Data values
 Addresses (untyped pointers)

Floating point data of 4, 8, or 10 bytes

Code: Byte sequences encoding series of instructions

No aggregate types such as arrays or structures
 Just contiguously allocated bytes in memory
28
Assembly Characteristics: Operations

Perform arithmetic function on register or memory data

Transfer data between memory and register
 Load data from memory into register
 Store register data into memory

Transfer control
 Unconditional jumps to/from procedures
 Conditional branches
29
Assembly Language Versions


There is only one Intel IA-32 machine language (1’s and 0’s)
There are two ways of writing assembly language on top of
this:
 Intel version
 AT&T version

UNIX/LINUX in general and the gcc compiler in particular
uses the AT&T version. That’s also what the book uses and
what we’ll use in these slides.
 Why? UNIX was developed at AT&T Bell Labs!

Most reference material is in the Intel version
30
Assembly Language Versions

There are slight differences, the most glaring being the
placement of source and destination in an instruction:
 Intel: instruction dest, src
 AT&T: instruction src, dest

Intel code omits the size designation suffixes
 mov instead of movl

Intel code omits the % before a register
 eax instead of %eax

Intel code has a different way of describing locations in
memory
 [ebp+8] instead of 8(%ebp)
31
Object Code
Code for sumstore
0x0400595:
0x53
0x48
0x89
0xd3
0xe8
0xf2
0xff
0xff
0xff
•
0x48
0x89 •
0x03
0x5b •
0xc3

Assembler





Total of 14 bytes
Each instruction
1, 3, or 5 bytes
Starts at address
0x0400595
Translates .s into .o
Binary encoding of each instruction
Nearly-complete image of executable code
Missing linkages between code in different
files
Linker
 Resolves references between files
 Combines with static run-time libraries
E.g., code for malloc, printf
 Some libraries are dynamically linked
 Linking occurs when program begins
execution

32
Machine Instruction Example

*dest = t;
C Code
 Store value t where designated by
dest

movq %rax, (%rbx)
Assembly
 Move 8-byte value to memory
Quad words in x86-64 parlance
 Operands:
t:
Register %rax
dest: Register %rbx
*dest: Memory M[%rbx]

0x40059e:

Object Code
 3-byte instruction
 Stored at address 0x40059e

Symbol table
 Assembler must change labels into memory
48 89 03
locations
 To do this, keeps a table that associates a
memory location for every label
 Called a symbol table
33
Disassembling Object Code
Disassembled
0000000000400595
400595: 53
400596: 48 89
400599: e8 f2
40059e: 48 89
4005a1: 5b
4005a2: c3

<sumstore>:
push
d3
mov
ff ff ff
callq
03
mov
pop
retq
%rbx
%rdx,%rbx
400590 <plus>
%rax,(%rbx)
%rbx
Disassembler
objdump –d sum
Otool –tV sum
// in Mac OS
 Useful tool for examining object code
 -d means disassemble
 sum is the file name (e.g., could be a.out)
 Analyzes bit pattern of series of instructions
 Produces approximate rendition of assembly code
 Can be run on either a.out (complete executable) or .o file
34
Alternate Disassembly
Disassembled
Object
0x0400595:
0x53
0x48
0x89
0xd3
0xe8
0xf2
0xff
0xff
0xff
0x48
0x89
0x03
0x5b
0xc3
Dump of assembler code for function sumstore:
0x0000000000400595 <+0>: push
%rbx
0x0000000000400596 <+1>: mov
%rdx,%rbx
0x0000000000400599 <+4>: callq 0x400590
<plus>
0x000000000040059e <+9>: mov
%rax,(%rbx)
0x00000000004005a1 <+12>:pop
%rbx
0x00000000004005a2 <+13>:retq

Within gdb Debugger
gdb sum
disassemble sumstore
 Disassemble procedure
x/14xb sum
 Examine the 14 bytes starting at sumstore
35
Direct creation of assembly programs
Assembly Program

In .s file

% gcc –S p.c
Result is an assembly program in
the file p.s
Assembler directives
Assembly commands
Symbols
.file
.text
.type
"assemTest.c"
sum.0, @function
sum.0:
pushl
movl
subl
movl
addl
leave
ret
.size
.globl main
.type
main:
pushl
movl
subl
andl
subl
movl
leave
ret
.size
.section
.ident
%ebp
%esp, %ebp
$4, %esp
12(%ebp), %eax
8(%ebp), %eax
sum.0, .-sum.0
main, @function
%ebp
%esp, %ebp
$8, %esp
$-16, %esp
$16, %esp
$0, %eax
main, .-main
.note.GNU-stack,"",@progbits
"GCC: (GNU) 3.4.6
36
Features of Disassemblers

Disassemblers determine the assembly code based purely on
the byte sequences in the object file.
 Do not need source file

Disassemblers use a different naming convention than the GAS
assembler.
 Example: omits the “l” from the suffix of many instructions.

Disassembler uses nop instruction (no operation).
 Does nothing; just fills space.
 Necessary in some machines because of branch prediction
 Necessary in some machines because of addressing restrictions
37
What Can be Disassembled?
% objdump -d WINWORD.EXE
WINWORD.EXE:
file format pei-i386
No symbols in "WINWORD.EXE".
Disassembly of section .text:
30001000 <.text>:
30001000: 55
push
%ebp
30001001: 8b ec
mov
%esp,%ebp
Reverse
engineering
forbidden by
30001003: 6a ff
push
$0xffffffff
User License
Agreement
30001005: 68Microsoft
90 10 00 End
30 push
$0x30001090
3000100a: 68 91 dc 4c 30 push
$0x304cdc91


Anything that can be interpreted as executable code
Disassembler examines bytes and reconstructs assembly source
38
Machine Programming I: Summary

History of Intel processors and architectures
 Evolutionary design leads to many quirks and artifacts

C, assembly, machine code
 Compiler must transform statements, expressions, procedures into
low-level instruction sequences

Assembly Basics: Registers, operands, move
 The x86 move instructions cover wide range of data movement
forms

Intro to x86-64
 A major departure from the style of code seen in IA32
39