Download A New Power-Factor-Correction Circuit with Resonant Energy Tank

IEEE ICSS2005 International Conference On Systems & Signals
A New Power-Factor-Correction Circuit with
Resonant Energy Tank for Class D Inverter
Ying-Chun Chuang
Hung-Shiang Chuang
Department of Electrical Engineering,
Kun Shan University of Technology
Tainan Hsien, Taiwan, R.O.C.
Tel：+886-6-2050519
Fax：+886-6-2050298
E-mail：chuang@mail.ksut.edu.tw
Department of Automation Engineering
Kao Yuan Institute of Technology
Kaohsiung, Taiwan, R.O.C.
Tel：+886-7-6077028
Fax：+886-7-6077112
E-mail：chuanghs@cc.kyit.edu.tw
Abstract –A new filtering technique named resonant energy
storage filter for AC/DC converter is proposed in this paper. As
compared with the conventional active filter, this approach is
advantageous of lower current stress and higher control
flexibility. In this paper, the proposed filtering approach is
implemented with class-D series-parallel resonant inverter. The
experimental results are provided to validate the theoretical
analyses. It is proven that the proposed approach can achieve
nearly unity power factor and very low harmonic distortion.
considerable losses.
To improve this drawback, this paper presents a new PFC
circuit with a resonant energy tank by which both
switching-on and switching-off losses can be relieved. The
proposed approach can easily be integrated into the class-D
inverter stage as a single-stage high-power-factor inverter. An
implementation on the series-parallel resonant inverter is
illustrated as a design example.
I. INTRODUCTION
Power electronic circuits with high-frequency class-D
resonant inverters are broadly used in many equipments such
as electronic ballasts, switching power supplies, battery
chargers, and so on. Conventionally, these equipments, when
extracting power from the ac line source, often use a diode
rectifier bridge with a bulk electrolytic capacitor to provide
smooth dc-link voltages for the high-frequency class-D
inverter. Such a rectifier circuit inevitably draws an input
current of narrow pulses, which is notoriously of very poor
power factor and serious harmonic contents. Hence, a low
cost and simple structure filter circuit becomes required in the
design of the dc-linked class-D inverter.
Among
many
filtering
topologies,
the
power-factor-correction (PFC) technique with a boost
converter has been proven to be efficient and simple [1-2].
This approach, however, is at the expense of an additional
power converter with sophisticated control leading to high
cost and lower overall efficiency. In an attempt to search for a
more compact, efficient and cost-effective solution, many
designs with single-stage converters have been developed
[3-7]. All these approaches make an integration of two power
converters, the power factor correction stage and the class-D
inverter. In this integrated circuit, the energy processing
scheme is the same as that of the two-stage PFC circuit. An
inductor with additional power semiconductor devices is
needed for temporarily storing the energy supplied from the
ac line source, and then transferring the energy to the dc-link
capacitor. The average of the high-frequency switching
current is made to follow the input line voltage to achieve a
high power factor. In order to reduce switching losses, the
inductor current can deliberately be operated at discontinuous
conduction mode (DCM)[2]. Hence switching on losses can
be eliminated. However, this converter will be switched off at
its peak current during every switching cycle resulting in
II. CIRCUIT CONFIGURATION AND ANALYSIS
A. Circuit Configuration
Fig. 1 shows the basic configuration of the proposed PFC
circuit. Instead of the inductor used in the conventional PFC
circuit, an energy resonant tank comprising an inductor and a
capacitor is used as the element for temporary energy storage.
The energy tank draws current from the ac line during the
switching-on of the active switch, S, in every high-frequency
switching cycle. When S is switched off, the energy stored in
the energy tank is transferred to the dc-link capacitor, C1,
through the energy transfer diode, Dpf. C1 is a bulk
electrolytic capacitor to provide a smooth dc-link voltage for
the class D inverter stage. Since S is switched on and off at a
high frequency, the input current becomes a pulsating
waveform at the same frequency. By properly controlling the
amplitude and duration of the pulsating current, the average of
the input current can be made to be sinusoidal and in phase
with the input voltage. The high frequency contents in the
input current can simply be removed by a small filter at the
input terminal. Consequently, a nearly unity power factor and
very low harmonic distortion can be achieved.
iCpf
iLpf
is(t)
+
+
vs (t)
-
Lpf
Cpf
+
-
vcpf
+
Dpf
S
d
C1
_
_
Class D
vdc Inverter
Stage
Control
Circuit
Fig. 1 PFC Circuit with resonant energy tank
As compared with the PFC circuit as a boost inductor, the
peak of the resonant current is smaller than the boost as
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IEEE ICSS2005 International Conference On Systems & Signals
shown in Fig. 2. Moreover, the power switch can be
deliberately switched off at a much smaller current, ideally at
the zero current. This means that the switching off loss can be
reduced or even eliminated.
i
Resonant
Curren
t
Ih
Ip
V s V dc

i Lpf 
t 
(t  ) I LO
L pf
o
(3)
where ILo is the initial current in the inductor.
Meanwhile, the energy stored in the capacitor of the
resonant tank is released to the following stage. The time td
needed for the inductor current iLpf to decline to zero can be
calculated by substituting (2) into (3).
Inductor
Current
I Lpf ,ave
T
the dc-link capacitor. During this period, the inductor current
decreases linearly.
t
/o
Vs
td 
 LC sin 
Vdc Vs
Fig. 2 Comparison of resonant current and inductor current
(4)
B. Circuit Operation and Analysis
Assuming the PFC circuit is supplied from the ac line
voltage source.
The average inductor current ILpf,avg in a switching cycle can
be obtained as follows
vs 
t Vsm sin st
I
t
1  o C pf
I Lpf ,avg  
(
V s sin o t )dt  LO d
0
T
L pf
2 T
(1)
where Vsm is the peak voltage and s is the line frequency.
In order to turn on the power switch at zero current, the
PFC circuit is designed to operate at DCM. In addition, the
dc-link voltage must be higher than the peak value of line
source voltage. When the power switch S is turned on, the
rectified line source voltage is applied on the resonant energy
tank and a resonant current is drawn from the ac line source.
The inductor current waveform is shown in Fig. 3.
C pf
i Lpf 
t v s
L pf
sin o t
(2)
where o is the resonant frequency of the resonant energy
tank and o 1 / L pf C pf 
The resonant frequency o is designed to be much higher
than line frequency s, therefore, input voltage can be
considered as constant during a resonant cycle.
C pf

T

V2
1
 sin 2  s
Vs 
1 cos 

2
V dc V s






(5)
The effective current can be calculated as:
LLpf ,rms 
V2
1  C 2
1
Vs 
 sin 2  s
1 cos 

0 ( ) 
Vdc Vs
 T 
2

2

ds (6)


where s is the angle of the line voltage.
The average input AC power is
1 
Pin  
Vs 
I Lpf ,ave ds
0
V s3
1 C pf  2
1
2


1
cos




sin


V

s
 T 0
2
V dc V s



ds


(7)
The input power factor can be calculated as
Pin
PF 
Vs 
I Lpf ,rms
d
t
0
iL

0.6
ILO
1 C pf  2
1
V3 
Vs 
1 cos 
ds
 sin 2  s 

0 
2
Vdc Vs 
 T



1 C pf
Vs,rms

0 
T
0.4
0.2
(8)
2
2

Vs2 
1 2

V

1
cos

sin





ds
s

Vdc Vs 
2



t
0

o
td
Mode I
Mode II
where Vs, rms Vsm / 2 is the effective value of the
input voltage.
The ratio of the peak value of the input voltage to the
dc-link voltage is denoted by 
.
T
Mode III
Mode I
Fig. 3 Current waveform of resonant energy converter
When ot , S is switched off, the energy diode Dpf
turns on and the energy stored in the inductor is delivered to
V
 sm
V dc
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(9)
IEEE ICSS2005 International Conference On Systems & Signals
Substituting (9) into (8), the power factor can be rewritten as:
PF 
sin 3 s 
1
 2

1 cos 
s 
 sin 2 
ds
2
1 
sin s 


III.
IMPLEMENTATION ON CLASS-D RESONANT
INVERTER
The proposed approach is implemented on a class-D
series-parallel resonant inverter as shown in Fig.. 5. The circuit
enclosed by dash lines denotes the proposed filter circuit. It
consists of a pair of resonant energy tanks and a pair of energy
transfer diodes. The two resonant energy tanks commonly use
the same inductor, L, and the active switches employ the
existent power switches of the inverter.

sin

0 
2


2
sin 2 s 
1 2








sin

1
cos

sin

ds

0  s
2
1 
sin s 


(10)
For simplicity, (10) can be expressed as:
2
x

 y
PF 
+
(11)
vs (t) is (t)
The two complex terms, x and y, in the equation are:
1
sin 3 s 
 2

sin s 
1 cos 
x 
ds
 sin 2 
0 
2
1 sin s 



1
 2 
1 cos  sin 2 {  
 
2
2  2
2


[ tan 1 (
)]}

2
2 2
1 2
 1 
2


2

[ tan 1 (
)]}
2
2 2
 1 
1 2
1
 4 3
2
 sin 4 {   
4
2  2 (1 2 )
(13)
Equation (11) indicates that the power factor is a function
of and as shown in Fig. 4. Generally, the power factor
increases as voltage ratio increases, expect when becomes
close to 1.0. Besides, a better power factor can be acquired for
a large 
. If is greater than 4π/5, no matter what voltage
ratio is, unity power factor can be achieved.
PF
1

=0.9

=0.7
0.9

=0.8
0.8

=0.6
0.7
=0.5
0.6
0.5
0

=0.4

5
2
5
3
5
4
5
Fig. 4 Calculated power factor
Dr 1
Dr 3
Dr 4
Dr2
Cx
Q1
D1
Cs
+
Vdc
icy(t)
Cy
io (t)
C1
Q2
CL
Class-D series-parallel
resonant inverter
D2
Dy
2
 
+ icx(t)
vcx(t) -
Fig. 5 Class-D series-parallel resonant inverter with the
proposed PFC circuit
(12)
42 3
2




[ tan 1 (
)]}
2
2
2
2
 1 
1 
1 2
iL(t)
Ls
Dx
vcy(t) +
-
1
sin s 

ds
y 
sin  
1 cos 
 sin 2 
0  s
2
1 sin s 



 2 
2
2
1 cos  
1 cos 
sin {  
 
2
2  2
2
L


At the low voltages of rectified line source, the circuit is
operated at discontinuous current mode as shown in Fig. 6.
The peak value of capacitor voltage vcx is less than Vdc and
the inductor current, iL, is small and will resonate to zero. The
operation can be divided into 5 time intervals. During interval
I, the transistor, Q2, is turned on and carries both io and iL.
The capacitor, Cx, is charged by this inductor current and vcy
is clamped at zero. At the end of this interval, the inductor
current resonant to zero, vcx reaches its maximum. At this
instant the rectifier and the diode Dy are reverse-biased.
During interval II, the load current flows through Q2 and
iLstays at zero. At the beginning of interval III, Q2 is switched
off, and the energy stored in Cx is transferred to the load and
vcx declines. When the rectified line voltage becomes greater
than vcx, the rectifier diodes become forward biased and
interval IV begins. Meanwhile, the line source starts to charge
Cx and Cy through the inductor. However, this charging
current is less than io which discharges Cx. Therefore, vcx
continuously decreases and falls to zero eventually. The diode
D1 turns on at the beginning of interval V, and carries the
freewheeling current which is equal to the difference between
iL and io. At the end of interval V, the freewheeling current
comes to zero and the transistor, Q1, is switched on. Since the
switches are operated symmetrically and Cy is equal to Cx, the
operation of the next half cycle is similar.
At the high voltages of the rectified line source, the inductor
circuit is continuous and of very small ripple as shown in Fig.
7. The operation can be divided into 4 time intervals. Interval
I starts at the instant when Q2 is switched on. Prior to this
time, Cx has been charged up and clamped at Vdc. Since C1 is
very large as compared with Cx, most of the inductor current
flows through C1 via Dx, therefore, Q2 carries only the
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IEEE ICSS2005 International Conference On Systems & Signals
0.8
0.8
io
iL
0.4
0
-0.4
-0.8
-0.8
vcx
300
vcx
200
100
0
200
100
0
vcy
300
200
100
vcy
300
200
100
0
0.8
0
0.8
iQ2
iQ2
0.4
0.4
0
0.8
0
0.8
iD1
0.4
0
iL
0
-0.4
300
io
0.4
I
II
0.4
0
V
iD1
I
II
III IV
III IV
Fig. 6 Theoretical waveforms for discontinuous current mode
Fig. 7 Theoretical waveforms for continuous current mode
load current. At the beginning of interval II, Q2 is switched
off and the energy stored in Cx is transferred to the load.
Meanwhile, Cy starts to be charged by the inductor current.
Although vcx declined, the voltage of Cy increases rapidly
because the inductor current is high, therefore the sum of vx
and vy may reach Vdc, then the diode Dy becomes forward
biased. As the inductor current mostly flows through C1
during interval III, Cx is continuously discharged by io. When
Cx is completely discharged, D1 turns on and carries the
freewheeling current. At the moment when the freewheeling
current comes to zero, Q1 is switched on and the next half
cycle ensues.
Fig. 8 shows the calculated input current waveform over
half a cycle of the line source. In this figure, the inverter
frequency is made low and the line-frequency contents are not
filtered for the purposed of illustration. It can be found
that
the input current is discontinuous over the lower range of the
ac-line voltage while becoming continuous over the higher
voltage range. The pulsating current dithers around a
sinusoidal fundamental wave, which is in phase with the input
voltage. Removing the line-frequency contents, a nearly
sinusoidal input current can be obtained.
A
0.4
0.3
iL(t)
0.2
0.1
0
0
/2
Fig. 8 Calculated input current waveform.

st
IV. DESIGN CONSIDERATIONS
In order to achieve unity power factor, the average
inductor current should be made to follow its fundamental
wave which is in phase with input line voltage. The
fundamental current can be determined by the input power
and the voltage specifications. Then, the optimum capacitance
can be calculated
P
C x  in
4 fVs2
(14)
where Pin and Vs denote the specified input power and
voltage, respectively and f is the switching frequency of the
class D resonant inverter.
The optimum capacitance is chosen to sustain the power
factor close to unity. Then the switch-off angle can be
determined accordingly. However, it should be reminded that
the high-frequency capacitor can not be too large since they
has to be completely deenergized before the transistor on the
same side has been turned on. Otherwise, the residual charge
would be short circuited at the switching on of the transistor.
This brings about a current spike that may damage the circuit
components.
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IEEE ICSS2005 International Conference On Systems & Signals
Since the maximum voltage of the high-frequency
capacitor is limited to the dc-link voltage, the maximum
energy stored in the capacitor is
1
L
2
o C x
1
2
E c(max)  C xVdc
2
On the other hand, the switching-off angle may be
predetermined in some practical designs. In this case, the
design procedure can be curried out inversely.
(15)
The capacitor energy begins to discharge at the instant of
switching off the opposite transistor. The discharging rate is
proportional to the difference between the load current and the
boost inductor current. The load current is with constant
amplitude while the average current of the boost inductor
substantially follows the input line voltage. This implies that
the lowest discharging rate happens at the peak of the input
line current. In practice, as illustrated in Fig. 7, the boost
inductor current around the peak point is with a very small
ripple so that can be assumed to be a constant. Fig. 9
illustrates that the available discharging interval is
approximately from to -. Within this interval, the load
current has risen up and becomes greater than the inductor
current. In other words, the transistor can only be turned off
after , but should be turned on before
-. This figure
reveals that the circuit can work properly only when the
amplitude of the load current is greater than that of the input
current. For the specified input power and the load current,
the maximum capacitance can be calculated

1 2 Pi
22 I m cos 
C x (max) 

oV dc 
V sm

(17)
V.
EXPERIMENT RESULTS
A class D resonant inverter with PFC circuit of Fig. 5 is
designed and built to drive a fluorescent lamp of 36W. The
circuit parameters are listed in Table 1. Figs. 10 and 11 show
the measured experimental waveforms of the laboratory
circuit, and they are quite consistent with those simulated. Fig.
12 shows the measured input line voltage and current. This
new design can achieved a high power factor greater than
0.99 and a low total harmonic distortion less than 8%. The
overall operating efficiency can be greater than 93%.
Table 1 Circuit parameters
Input voltage Vs
220 V, 60Hz
Switching frequency f
38kHz
Dc-link voltage Vdc
320V
Capacitors Cx, Cy
4.7nF
Inductor L
3.5mH
(16)
vcx (t)
The selected capacitance is restricted by this maximum value
if it is less than the optimum capacitance calculated from (14).
Under this condition, the power factor would be deteriorated.
iL(t)
0
A
io(t)
0.6
Time: 5us/div
Voltage: 100v/div
Current: 0.2A/div
0.4
(a)
iL(peak)
0.2
0
vcx(t)

 
t
iL(t)
0
Fig. 9 Relationship between io(t) and iL(t) at st=/2.
As described above, the boost inductor also serves as a
current smoothing reactor. A larger inductor can make a
smaller ripple in the input current. However, the inductance
should be small enough so as to ensure that the half-cycle
resonance can be completed and the capacitor voltage can be
charged to its maximum value before the opposite transistor
has been switched off. Therefore, once the capacitance and
the switching-off angle are given, the inductance can then be
obtained
Time: 5us/div
Voltage: 100v/div
Current: 0.2A/div
(b)
Fig. 10 Measured waveforms of inductor current and
capacitor voltage at (a) st=/8 and (b)st=/2.
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IEEE ICSS2005 International Conference On Systems & Signals
VI.
CONCLUSIONS
A new PFC circuit with resonant energy tank for class
D inverter has been presented. Theoretical and experimental
results prove that almost unity power factor can be achieved.
With two energy storage elements, the control flexibility can
be improved. When the active power switches are designed to
be softly switched on and off at zero current, the switching
losses can be completely eliminated and leading to high
efficiency. Moreover, the peak of the inductor current is
smaller as compared with the conventional PFC circuit.
Therefore, a smaller inductor can be used and the current
stresses on the power switches can be reduced.
io (t)
iQ 2
iD 2
0
Time: 5us/div
Current: 0.5A/div
(a)
VII.
REFERENCES
[1] K. H. Liu, and Y. L. Lin, "Current Waveform Distortion in
Power
Factor
Correction
Circuits
Employing
Discontinuous-Mode Boost Converters," Conference Record of
IEEE Power Electronics Specialists Conference, pp. 825-829,
1998.
[2] M. Kazerani, P. D. Ziogas, and G. Joos, "A Novel Active Current
Waveshaping Technique for Solid-State Input Power Factor
Conditioners," IEEE Trans. on Ind. Electron., Vol. 38, No. 1, pp.
72-78, Feb. 1991..
io (t)
0
iQ 2
0
iD 2
0
Time: 5us/div
Current: 0.5A/div
(b)
Fig. 11 Current waveforms of transistor, antiparallel diode,
and load current at (a) st=/8 and (b)st=/2.
[3] R. de Oliveira Brioschi, and J. L. F. Vieira,
"High-Power-Factor Electronic Ballast with Constant
DC-Link Voltage," IEEE Transactions on Power
Electronics, Vol. 13, No. 6, pp. 1030-1037, Nov. 1998.
[4] C. Licitral, L. Malesani, G. Spiazzi, P. Tenti, and A.
-Ended Soft-Switching Electronic Ballast
Applications, Vol. 29, no. 2, pp. 382-387, March/April
1993.
[5] E. Deng, and S. Cuk, "Single Stage, High Power Factor,
Lamp Ballast," Conference Record of IEEE Applied
Power Electronics Conference, pp. 441-449, 1994.
[6] C. Licitra, L. Malesani, G. Spiazzi, P. Tenti, and A. Testa,
"Single-Ended Soft-Switching Electronic Ballast with
Unity Power Factor," IEEE Transactions on Industry
Applications, Vol. 29, No. 2, pp. 382-387, March/April
1993.
[7]
-Switching
vs(t)
is(t)
Time: 5ms/div
Voltage: 100v/div
Current: 0.2A/div
Fig. 12 Experimental waveforms of input line voltage and
current
~ 65 ~
Power Appl., Vol. 138, pp. 286-296, Non. 1991.