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A compact model for thin SOI LIGBTs:
description, experimental verification
and system application
Ettore Napoli1,2, Vasantha Pathirana1, Florin Udrea1,3,
Guillaumme Bonnet3,Tanja Trajkovic3,Gehan Amaratunga3
1
Dept. of Engineering, University of Cambridge, UK
2 Dept. Electronic and Telecom. Univ. of Napoli, Italy
3 Cambridge Semiconductor (CamSemi), UK
EU research program ROBUSPIC
CAMBRIDGE
UNIVERSITY
NAPOLI
UNIVERSITY
ISPSD, Santa Barbara, May 2005
Outline




Motivation
Thin SOI LIGBT
Differences with Vertical IGBT
Spice sub-circuit model for LIGBT
 Model equations
 Model behavior
 Half bridge circuit using lateral IGBT
 Experimental results on flyback circuit
 Conclusion
CAMBRIDGE
UNIVERSITY
NAPOLI
UNIVERSITY
ISPSD, Santa Barbara, May 2005
Motivation
• Available IGBT circuit models are not suited to
Lateral IGBT
• Need for
– a reliable physical based model for Lateral IGBT
– usable in various circuit simulators
• Extension to different LIGBT technologies
• Important for smart power design
CAMBRIDGE
UNIVERSITY
NAPOLI
UNIVERSITY
ISPSD, Santa Barbara, May 2005
Thin SOI Lateral IGBT
•
•
•
•
600V PT
Transparent buffer
Source and Drain up to the BOX
Current flow is horizontal and 1D
CAMBRIDGE
UNIVERSITY
NAPOLI
UNIVERSITY
ISPSD, Santa Barbara, May 2005
Differences with Vertical IGBT (1)
• Not zero carrier concentration at the collector edge
for LIGBT
CAMBRIDGE
UNIVERSITY
NAPOLI
UNIVERSITY
ISPSD, Santa Barbara, May 2005
IGBT models not suited for LIGBT (1)
• Total charge and charge profile
LIGBT
Q  P0  PW qAL tanh W 2L 
P0 sinh W  x  L  PW sinh x L 
p x  
sinh W L 
Vertical IGBT
Q  P0 qAL tanh W 2L
sinh W  x  L
p x   P0
sinh W L 
CAMBRIDGE
UNIVERSITY
NAPOLI
UNIVERSITY
ISPSD, Santa Barbara, May 2005
Differences with Vertical IGBT (2)
• Depletion width vs. reverse voltage is influenced
by 2D effects
CAMBRIDGE
UNIVERSITY
NAPOLI
UNIVERSITY
ISPSD, Santa Barbara, May 2005
IGBT models not suited for LIGBT (2)
• Voltage rise at turn-off is faster due to lower charge
in the epilayer and slower depletion width
expansion
CAMBRIDGE
UNIVERSITY
NAPOLI
UNIVERSITY
ISPSD, Santa Barbara, May 2005
IGBT models not suited for LIGBT (3)
• Important effects such as the voltage bump,
resulting in a delay in the turn-off, are not
considered
CAMBRIDGE
UNIVERSITY
NAPOLI
UNIVERSITY
ISPSD, Santa Barbara, May 2005
Spice sub-circuit model for LIGBT
Currents and voltages
CAMBRIDGE
UNIVERSITY
NAPOLI
UNIVERSITY
Epilayer charge equation
ISPSD, Santa Barbara, May 2005
Spice sub-circuit model for LIGBT
Drain
S
Vj
Vdrift
Cox Cdep
N
Gate
Vmos
IP(W)
Q
Cds
+

IN(0) IN(W) IPC_TRN
BOX
IN(W)
Cgs
G
+
P
Vmos
IN(W)
IP(W)
N
-
Vdrift
IN(0)
D
N
P
+
Vj
Substrate
Source
• Vj :
Emitter junction
• Vdrift:
Depends on the injected carriers
– analytic solution
• Vmos:
Mosfet (level 1)
CAMBRIDGE
UNIVERSITY
NAPOLI
UNIVERSITY
ISPSD, Santa Barbara, May 2005
Spice sub-circuit model for LIGBT
Drain
S
Vj
Vdrift
Cox Cdep
N
Gate
Vmos
IP(W)
Q
Cds
+

IN(0) IN(W) IPC_TRN
BOX
IN(W)
Cgs
G
+
P
Vmos
IN(W)
IP(W)
N
-
IN(0)
D
N
P
Vdrift
+
Vj
Substrate
Source
• IN(W) : Electron current through the level 1 Mosfet
CAMBRIDGE
UNIVERSITY
NAPOLI
UNIVERSITY
ISPSD, Santa Barbara, May 2005
Spice sub-circuit model for LIGBT
Drain
S
Vj
Vdrift
Cox Cdep
N
Gate
Vmos
IP(W)
Q
Cds
+

IN(0) IN(W) IPC_TRN
BOX
IN(W)
Cgs
G
+
P
Vmos
IN(W)
IP(W)
N
-
Vdrift
IN(0)
D
N
P
+
Vj
Substrate
Source
• IP(W) : Bipolar hole current
  coth (W/L)
 
1
  

 P0 
2
b
sinh
(W/L)
P
qAD  
 
I P (W )  0 2 I sne 
L 
bni


1
 Pw  coth (W/L) 

b sinh (W/L) 


CAMBRIDGE
UNIVERSITY
NAPOLI
UNIVERSITY
ISPSD, Santa Barbara, May 2005
Spice sub-circuit model for LIGBT
Drain
S
Vj
Vdrift
Cox Cdep
N
Gate
Vmos
IP(W)
Q
Cds
+
+
P

IN(0) IN(W) IPC_TRN
BOX
IN(W)
Cgs
G
IN(W)
IP(W)
Vmos
N
-
Vdrift
IN(0)
D
N
P
+
Vj
Substrate
Source
• IN(0) : Electron current through the emitter junction
I N (0)  I sne
CAMBRIDGE
UNIVERSITY
P0(N B  P0 )
ni
2
NAPOLI
UNIVERSITY
 I sne
P0
2
ni
2
ISPSD, Santa Barbara, May 2005
Spice sub-circuit model for LIGBT
Drain
P
Vj
Time is
increasing
Vdrift
Cox Cdep
Gate
Vmos
IP(W)
Q
Cds

PW
IN(0) IN(W) IPC_TRN
Wt
IN(W)
Cgs
Source
• IPC_TRN :
0
Wt+δt
Wt+2δ
Increasing Anodet
Voltage
0
Stable Anode
Voltage
Transient current due to charge sweep-out
I PC _ TRN
CAMBRIDGE
UNIVERSITY
W t 
 qApW t 
t
NAPOLI
UNIVERSITY
ISPSD, Santa Barbara, May 2005
Base charge equation




IN(W) is the MOSFET current
IN(0) is the emitter edge electron current
IPC_TRN is the charge sweep out current
The last term is for the recombination in the base
Q
Q
 I N W   I N 0  I PC _ TRN 
t

CAMBRIDGE
UNIVERSITY
NAPOLI
UNIVERSITY
ISPSD, Santa Barbara, May 2005
Other model features
 Carrier concentration dependent mobility model
 Gate-Source Drain-Source and Gate-Drain
capacitances are implemented
 Physical based model with 13 parameters
CAMBRIDGE
UNIVERSITY
NAPOLI
UNIVERSITY
ISPSD, Santa Barbara, May 2005
Model behavior
Expanded for I=1A, V=200V
Voltage
Current
Power
Inductive Turn-off
CAMBRIDGE
UNIVERSITY
NAPOLI
UNIVERSITY
ISPSD, Santa Barbara, May 2005
Model behavior
• Toff Energy vs. Von as a function of lifetime
CAMBRIDGE
UNIVERSITY
NAPOLI
UNIVERSITY
ISPSD, Santa Barbara, May 2005
Half bridge circuit
• Output characteristics
200V; 2A; 100kHz
CAMBRIDGE
UNIVERSITY
NAPOLI
UNIVERSITY
ISPSD, Santa Barbara, May 2005
Experimental results on flyback circuit
2
Drain current [A]
Experimental results
Our model
1.5
Vg=4V
1
0.5
0
CAMBRIDGE
UNIVERSITY
Vg=5V
Vg=3V
Vg=2V
0
1
2
3
Drain voltage [V]
NAPOLI
UNIVERSITY
4
5
ISPSD, Santa Barbara, May 2005
Experimental results on flyback circuit
Power [kW]
1.0
480
Experimental result
Our model
400
0.8
320
0.6
240
0.4
160
0.2
80
0
0.3
0
Drain Voltage [V]
Drain Current [A]
1.2
Experimental result
Our model
0.2
0.1
0
0
CAMBRIDGE
UNIVERSITY
50
100
150
Time [ns]
NAPOLI
UNIVERSITY
200
250
300
ISPSD, Santa Barbara, May 2005
Flyback circuit simulation
1K
1mF
20
Complete flyback
circuit
47pF
22F
100V
D
LIGBT
The simulated
waveforms are for
the primary winding
voltage (green) and
the load voltage (red)
200
Voltage [V]
100
0
-100
-200
-300
0
20
40
CAMBRIDGE
UNIVERSITY
60
Time [s]
80
100
NAPOLI
UNIVERSITY
ISPSD, Santa Barbara, May 2005
Conclusion
• A physical based circuit model for Lateral IGBT
• Implemented in Spice
• Compared against
– Device numerical simulation
– Complex SMPS simulation
– Experimental results
• Extendable to Thick SOI and JI-LIGBT
CAMBRIDGE
UNIVERSITY
NAPOLI
UNIVERSITY
ISPSD, Santa Barbara, May 2005
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