Download On the minimum supply voltage for CMOS analog circuits - Mos-AK

Federal University of Santa Catarina
Department of Electrical Engineering
Integrated Circuits Laboratory
On the minimum supply voltage for
CMOS analog circuits:
rectifiers and oscillators
Carlos Galup-Montoro, Marcio C. Schneider and Marcio B. Machado
1
Rectifier outline
Background: microwave power detection
Power/peak detector
Half-wave rectifier
MOSFETs as diodes
Weak inversion MOSFET model
2
Background: microwave power detection
Basic detector circuit
Wetenkamp, IEEE MTT-S Int.
Microwave Symp. Dig., 1983
3
Power/Peak Detector 1
A simple case: square-wave
Steady-state analysis
input
Basic principle: charge conservation
1
T
Waveforms for
T /2
∫
−T / 2
I D dt = 0
I D = I 0 [e
VD
nφt
− 1]
 0   −VP −Vo  
T /2   VP −Vo 
 
 nφ 
I0    nφt  
e
−1 dt + ∫  e t  −1dt  = 0
∫


 
T −T /2 
0


 
 
VP >> nφt
Assumption: very low ripple → Vo ≅
constant
Vo
= ln  cosh (VP nφt ) 
nφt
I0
-I0
4
Power/Peak Detector 2
A simple case: square-wave input
Vo
= ln  cosh (VP nφt ) 
nφt
Power Detector
VP << nφt
→
Vo 1  VP 
≅ 

nφt 2  nφt 
Peak Detector
VP >> nφt
2
Diode “ON”
voltage drop
→ VO ≅ VP − nφt ln 2
Input
Results for sine input are similar.
Difference is a “form factor”
5
Half-wave rectifier circuit 1
Steady-state analysis (similar to peak detector)
Basic principle: charge conservation
 0   −VP −Vo  
T /2   VP −Vo 
 
 nφ 
I0    nφt  
 e t  −1dt  = I L
1
e
−
dt
+
∫0 

 
T −T∫/2 


 
 
Assumption: very low ripple → Vo ≅ constant
 cosh (VP nφt ) 
Vo
= ln 

nφt
I
I
1
+
/


L
0
6
Half-wave rectifier circuit 2
Input
VP > nφt
Waveforms for
→
Diode “ON”
voltage drop
 I + I0 
Vo ≅ VP − nφt ln  P

I
0


V P >> nφt


I
nφt ln  2 1 + L  
I
0 
 
Vo (V)
Io = 4.5 nA
IP=2IL+I0
IL=(IP-I0)/2
-I0
7
MOSFETs as diodes
Conventional
Channel and extrisinc
diode are in anti-parallel
DTMOS
Channel and extrisinc
diode are in parallel
8
Weak inversion MOSFET model
φt =
I F = 2 I S q ′IS
kT
( = 26 mV @ 300K)
q
I S = µ Cox′ n
ID
φt2 W
2 L
W
L
D
S
VP −VS ( D ) B
I R = 2 I S q ′ID
W, L
= I SQ
qIS′ ( D) = e
φt
VGB −VT 0 −nVS ( D ) B
≅e
nφt
width, length of the channel
µ mobility,
C’ox gate capacitance per unit area,
n slope factor ( n = 1.2-1.6)
VP pinchoff voltage , VT0 threshold voltage
q’IS and q’ID are the normalized carrier densities (to the thermal charge − nCox′ φt ) at
source and drain.
IS and ISQ are the normalization (specific) and “sheet” normalization currents.
9
DTMOS diode in WI
for the DTMOS connection VGB = VDB = 0, v = -VSB
−
I DS = I F − I R = 2 I S e
VT 0
nφt
 φv

t
 e − 1




the DTMOS diode behaves as a diode with ideality factor n = 1 for low
voltage (weak inversion) operation.
I DS
 φv 
= I D = I0  e t −1




Current I0 of the DTMOS diode can be determined as the saturated drain
current of the (conventionally connected) transistor with VGB = VSB = 0.
−
I DSsat = I F = 2 I S e
VT 0
nφt
= I0
10
Standard, low-VT and zero-VT
MOSFETs in a 130 nm technology
W/L = 3µm/0.42 µm
11
Rectifier summary
Analytical model of the rectifier circuit in which the
nonlinear device follows the diode Shockley
(exponential) equation.
The model is correct for input voltages down to
below the thermal voltage.
The main design parameter is the diode saturation
current I0.
−VTO
W nφt
For a DTMOS (WI) diode
I ∝ e
0
L
we can take advantage of aspect ratio and of
different VT’s
12
Oscillator outline
Background: minimum supply voltage for FET
circuits
MOSFET charge based model
Low voltage operation of the (C)MOS inverter
Ring oscillator
Colpitts oscillator
13
Background 1: minimum supply
voltage for the CMOS inverter
CMOS inverter transfer characteristics
( Swanson and Meindl, IEEE JSSC 1972)
Prof. James Meindl:
Theoretically, the minimum
supply voltage for a CMOS
inverter is
2 (ln2) (kT/q) = 36 mV
at room temperature
(IEEE JSSC, 2000)
14
Background 2: oscillators with super
Kleijer, available at
low supply voltage Dick
http://www.dickswebsite.eu/fetosc/enindex.htm
Supply
voltage
Supply
current
2x J
310
19 mV
1.04 mA
3x J
310
17 mV
1.40 mA
FET
type
Oscillator with very high
impedance winding (4 MΩ)
transformer running on 5.5
mV supply voltage
Horizontal: 1 ms /div.
Vertical: 200 mV /div.
15
MOSFET charge-based model 1
′ + q′
I F = I S ( 2 q IS
2
IS
I S = µ Cox′ n
)
ID
D
S
φt2 W
2 L
= I SQ
W
L
ID = IF − IR
(
I F ( R ) = I S 2qIS′ ( D ) + qI′2(S ) D
)
′2 )
I R = I S ( 2 q ′ID + q ID
W, L
width, length of the channel
µ mobility,
C’ox gate capacitance per unit area,
n slope factor ( n = 1.2-1.6)
q’IS and q’ID are the normalized carrier densities (to the thermal charge − nCox′ φt )
at source and drain.
IS and ISQ are the normalization (specific) and “sheet” normalization currents.
16
MOSFET charge-based model 2 : LF small
signal model in the triode region
G
g md =
2I S
φt
q′ID
S
g md vd
gmbvb
id
D
gmsvs
g mg
g ms − g md
=
n
g ms =
gmgvg
2I S
φt
qIS′
B
g ms = g mg + g mb + g md
17
MOSFET charge-based model 3:the
unified charge control model (UCCM)
VP is the pinch-off voltage
VP − VS
φt
g ms =
2I S
φt
= qIS′ − 1 + ln ( qIS′ )
VP − VD
φt
′ )
= q′ID − 1 + ln ( qID
 qIS′ 
′
′
= qIS − qID + ln 

′
φt
q
 ID 
VDS
q′IS
g md =
In WI
VDS
 g ms 
=
g
−
g
+
ln
φ
( ms md ) t  
2I S
 g md 
φt2
2I S
φt
q′ID
V
DS
g ms qIS′
=
= e φt
g md q′ID
18
Low-voltage operation of the MOS
inverter (WI / triode region)
VDD
ID
M1
VI
weak inversion operation
( IB ideal current source)
IB
+
Intrinsic gain stage
VO
AV =
g mg
g md

g − g md 1  g ms
= ms
= 
− 1
ng md
n  g md

g ms
g md
V
DS
qIS′
=
= e φt
′
qID
VDS


1 φt
AV =  e − 1

n 

or
VDS = φt ln (1 + n AV
)
19
Low–voltage operation of the (C)MOS
inverter (WI / triode region)
V
DD
VDD
M2
VDS = φt ln (1 + n AV
iD
)
vout
VDD
Minimum supply voltage for
amplification
AV = 1
+
- vin
vout
M1
Av
VTH = VDD/2
‘ideal’ MOSFET n = 1
VTH
VDS = VDD
VDD min = (ln 2)φt
VDD
VDS = VDD / 2
VDD min = 2(ln 2)φt
20
vin
Ring oscillator 1
g mg
Vout
1
=−
Vin
g md + G p 1 + j tan θ
Minimum gain for oscillation
For the sake of simplicity, we consider θ = π.
g mg
1
g md + G p 1 + tan θ
2
g mg
g md + G p
>1
>1
21
Ring oscillator 2
Minimum gain for oscillation
g mg
g md + G p
=
g ms − g md
>1
n ( g md + G p )
or
Gp 

g ms
≥ 1 + n 1 +

g md
g
md 

From the UCCM
VDD min =

G 

n ( g md + G p ) + φt ln 1 + n 1 + p  
2I S
 g md  

φt2
SI
WI
Considering high Q inductor (GP<<gmd) and WI
operation and n = 1
VDD min = ( ln 2 ) φt
22
Colpitts oscillator 1
For high Q inductor (Ginductor<< gmd)
and WI operation

C 
VDD min ≅ φt ln 1 + n 2 
C1 

23
Colpitts oscillator 2
Photograph of the oscillator working from a
thermoelectric generator at T=24 oC.
24
Oscillator summary
There is no hard low voltage limit for analog MOS
circuits (oscillators can operate with supply
voltage under kT/q)
The ideal active device for low voltage operation
is a MOSFET with threshold voltage near zero
( for WI operation at low supply voltage)
The charge based MOSFET model is very
convenient for the design of ultra-low-voltage
circuits (operation in triode region/ WI)
25
References
M. C. Schneider and C. Galup-Montoro, CMOS Analog Design
Using All-Region MOSFET Modeling, Cambridge University
Press, 2010.
A. J. Cardoso, L. G. de Carli, C. Galup-Montoro, and M. C.
Schneider, "Analysis of the rectifier circuit valid down to its lowvoltage limit, " IEEE Transactions on Circuits and Systems I,
2011.
F. R. de Sousa, M. B. Machado, C. Galup-Montoro, “ A 20 mV
Colpitts Oscillator powered by a thermoelectric generator,
submitted to ISCAS 2012.
26