MAX3880 +3.3V, 2.488Gbps, SDH/SONET 1:16 Deserializer with Clock Recovery General Description
... 2.488Gbps serial data to 16-bit-wide, 155Mbps parallel data. The device combines a fully integrated phaselocked loop (PLL), input amplifier, data retiming block, 16-bit demultiplexer, clock divider, and LVDS output buffer (Figure 3). The PLL consists of a phase/frequency detector (PFD), a loop filte ...
... 2.488Gbps serial data to 16-bit-wide, 155Mbps parallel data. The device combines a fully integrated phaselocked loop (PLL), input amplifier, data retiming block, 16-bit demultiplexer, clock divider, and LVDS output buffer (Figure 3). The PLL consists of a phase/frequency detector (PFD), a loop filte ...
DM7417 Hex Buffers with High Voltage Open
... 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N14A ...
... 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N14A ...
PDF
... Fix the clock frequency by using a crystal oscillator Exploit peizo-electric effect in quartz to create highly resonant peak in feedback loop of oscillator Easy to obtain frequency accuracy of ~50 parts per million ...
... Fix the clock frequency by using a crystal oscillator Exploit peizo-electric effect in quartz to create highly resonant peak in feedback loop of oscillator Easy to obtain frequency accuracy of ~50 parts per million ...
DM7417 datasheet
... 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package Number N14A ...
... 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package Number N14A ...
EUM6179/6179A Single-Phase Full-Wave Motor Driver for Fan Motor
... Once IC destroyed, failure mode cannot be defined ( like short-mode or open-mode). Therefore, physical security countermeasure, like fuse, is to be given when a specific mode to exceed the absolute maximum ratings is considered. GND potential The GND terminal should be the location of the lowest vol ...
... Once IC destroyed, failure mode cannot be defined ( like short-mode or open-mode). Therefore, physical security countermeasure, like fuse, is to be given when a specific mode to exceed the absolute maximum ratings is considered. GND potential The GND terminal should be the location of the lowest vol ...
SP6648 Evaluation Board Manual
... avoid saturating the inductor, which would result in a loss in efficiency and could damage the inductor. The SP6648 evaluation board uses a Rlim value of 1.87K for an Ipeak = 750mA to allow the circuit to deliver up to 180mA for 1.3V input and 400mA for 2.6V input. Other values could be selected usi ...
... avoid saturating the inductor, which would result in a loss in efficiency and could damage the inductor. The SP6648 evaluation board uses a Rlim value of 1.87K for an Ipeak = 750mA to allow the circuit to deliver up to 180mA for 1.3V input and 400mA for 2.6V input. Other values could be selected usi ...
(For NEMA 1 Rated Configured Drives) GENERAL
... frequency range of 1 kHz to 12.5 kHz, permits quiet motor operation. This drive has one control logic board for all horsepower ratings. Printed circuit boards employ surface mount technology, providing both high reliability, and small physical size of the printed circuit assemblies. The dual 32 bit ...
... frequency range of 1 kHz to 12.5 kHz, permits quiet motor operation. This drive has one control logic board for all horsepower ratings. Printed circuit boards employ surface mount technology, providing both high reliability, and small physical size of the printed circuit assemblies. The dual 32 bit ...
DS460S Electrical Specifications
... DC OK threshold is defined as when the 12 V output is greater than 11.5 V. DC not OK threshold is defined as when the 12 V output is less than 11.4 V & greater than 11.3 V. Provides both the load sharing function (as a feedback for output regulation droop function) and 12 V output current informatio ...
... DC OK threshold is defined as when the 12 V output is greater than 11.5 V. DC not OK threshold is defined as when the 12 V output is less than 11.4 V & greater than 11.3 V. Provides both the load sharing function (as a feedback for output regulation droop function) and 12 V output current informatio ...
DM7417 Hex Buffers with High Voltage Open-Collector
... 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N14A ...
... 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N14A ...
DM7417 Hex Buffers with High Voltage Open
... 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package Number N14A ...
... 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package Number N14A ...
3 The TTL NAND Gate
... becomes forward-biased and the transistor conducts. The other characteristics of the circuit and its transfer characteristic are identical to those of the inverter circuit. ...
... becomes forward-biased and the transistor conducts. The other characteristics of the circuit and its transfer characteristic are identical to those of the inverter circuit. ...
DM74LS47 BCD to 7-Segment Decoder/Driver with Open
... HIGH level and the ripple-blanking output (RBO) goes to a LOW level (response condition). Note 5: When the blanking input/ripple-blanking output (BI/RBO) is OPEN or held at a HIGH level, and a LOW level is applied to lamp test input, all segment outputs go to a LOW level. ...
... HIGH level and the ripple-blanking output (RBO) goes to a LOW level (response condition). Note 5: When the blanking input/ripple-blanking output (BI/RBO) is OPEN or held at a HIGH level, and a LOW level is applied to lamp test input, all segment outputs go to a LOW level. ...
DC303 - Smar
... Easy Installation The DC303 Remote I/O units can be distributed into the field where they are mounted close to the conventional devices without the need to run the conventional wiring to the control room. The unit may be installed close to the sensors and actuators, thereby eliminating long wire run ...
... Easy Installation The DC303 Remote I/O units can be distributed into the field where they are mounted close to the conventional devices without the need to run the conventional wiring to the control room. The unit may be installed close to the sensors and actuators, thereby eliminating long wire run ...
Flip-flop (electronics)
In electronics, a flip-flop or latch is a circuit that has two stable states and can be used to store state information. A flip-flop is a bistable multivibrator. The circuit can be made to change state by signals applied to one or more control inputs and will have one or two outputs. It is the basic storage element in sequential logic. Flip-flops and latches are a fundamental building block of digital electronics systems used in computers, communications, and many other types of systems.Flip-flops and latches are used as data storage elements. A flip-flop stores a single bit (binary digit) of data; one of its two states represents a ""one"" and the other represents a ""zero"". Such data storage can be used for storage of state, and such a circuit is described as sequential logic. When used in a finite-state machine, the output and next state depend not only on its current input, but also on its current state (and hence, previous inputs). It can also be used for counting of pulses, and for synchronizing variably-timed input signals to some reference timing signal.Flip-flops can be either simple (transparent or opaque) or clocked (synchronous or edge-triggered). Although the term flip-flop has historically referred generically to both simple and clocked circuits, in modern usage it is common to reserve the term flip-flop exclusively for discussing clocked circuits; the simple ones are commonly called latches.Using this terminology, a latch is level-sensitive, whereas a flip-flop is edge-sensitive. That is, when a latch is enabled it becomes transparent, while a flip flop's output only changes on a single type (positive going or negative going) of clock edge.