ADS1018 - Texas Instruments
... The ADS1018 is a precision, low-power, 12-bit, noisefree, analog-to-digital converter (ADC) that provides all features necessary to measure the most common sensor signals in an ultrasmall, leadless, X2QFN-10 or VSSOP-10 package. The ADS1018 integrates a programmable gain amplifier (PGA), voltage ref ...
... The ADS1018 is a precision, low-power, 12-bit, noisefree, analog-to-digital converter (ADC) that provides all features necessary to measure the most common sensor signals in an ultrasmall, leadless, X2QFN-10 or VSSOP-10 package. The ADS1018 integrates a programmable gain amplifier (PGA), voltage ref ...
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... Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any ...
... Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any ...
Particle Swarm Optimisation for Outlier Detection
... contain noise that tends to make normal observations appear similar to the actual outliers and vice versa. Numerous techniques have been proposed to detect outliers for different applications. These techniques can be categorised into several approaches [5, 9, 3]: statistical approach, clustering bas ...
... contain noise that tends to make normal observations appear similar to the actual outliers and vice versa. Numerous techniques have been proposed to detect outliers for different applications. These techniques can be categorised into several approaches [5, 9, 3]: statistical approach, clustering bas ...
AD7655 数据手册DataSheet下载
... Linearity is tested using endpoints, not best fit. LSB means least significant bit. With the 0 V to 5 V input range, 1 LSB is 76.294 μV. ...
... Linearity is tested using endpoints, not best fit. LSB means least significant bit. With the 0 V to 5 V input range, 1 LSB is 76.294 μV. ...
PDF
... power factor and sinusoidal output current [2], [7]–[13]. Thanks to technological advances, fast and powerful microprocessors are used for the control and modulation of power converters. To deal with the high processing power needed for these microprocessors, some research has shown the positive pot ...
... power factor and sinusoidal output current [2], [7]–[13]. Thanks to technological advances, fast and powerful microprocessors are used for the control and modulation of power converters. To deal with the high processing power needed for these microprocessors, some research has shown the positive pot ...
MAX144/MAX145 Full Data Sheet (PDF)
... capacitance of the ADC. Source impedances below 1k have no significant impact on the AC perfor- mance of the MAX144/MAX145. Higher source impedances can be used if a 0.01µF capacitor is connected to the individual analog inputs. Together with the input impedance, this capacitor forms an RC filter, ...
... capacitance of the ADC. Source impedances below 1k have no significant impact on the AC perfor- mance of the MAX144/MAX145. Higher source impedances can be used if a 0.01µF capacitor is connected to the individual analog inputs. Together with the input impedance, this capacitor forms an RC filter, ...
Design and Implementation of the Universal Interface Controller
... versatile since they can be reconfigured to perform various tasks. The 32 pins are divided into 4 ports each consisting of 8 pins: port 0 (P0), port1 (P1), port 2 (P2) and port3 (P3). Port 0 is an open drain bi-directional 8-bit I/O port. When 1s are written to the port 0 pins and held at that logic ...
... versatile since they can be reconfigured to perform various tasks. The 32 pins are divided into 4 ports each consisting of 8 pins: port 0 (P0), port1 (P1), port 2 (P2) and port3 (P3). Port 0 is an open drain bi-directional 8-bit I/O port. When 1s are written to the port 0 pins and held at that logic ...
Chapter 02 - Data Types
... Overflow = the result doesn’t fit in the capacity of the representation ALU’s are designed to detect overflow ...
... Overflow = the result doesn’t fit in the capacity of the representation ALU’s are designed to detect overflow ...
DS1302 数据手册DataSheet 在线下载
... Driving the CE input high initiates all data transfers. The CE input serves two functions. First, CE turns on the control logic that allows access to the shift register for the address/command sequence. Second, the CE signal provides a method of terminating either single-byte or multiple-byte CE dat ...
... Driving the CE input high initiates all data transfers. The CE input serves two functions. First, CE turns on the control logic that allows access to the shift register for the address/command sequence. Second, the CE signal provides a method of terminating either single-byte or multiple-byte CE dat ...
Near-field imaging of scattering obstacles with the factorization method
... resulting adjoint for N would be defined via a bilinear other than sesquilinear form giving arise to essential difficulties in the characterization of D (see [7, chapter 1.7] for details). To overcome such a difficulty, three main approaches have been proposed so far. One is to convert the near-field op ...
... resulting adjoint for N would be defined via a bilinear other than sesquilinear form giving arise to essential difficulties in the characterization of D (see [7, chapter 1.7] for details). To overcome such a difficulty, three main approaches have been proposed so far. One is to convert the near-field op ...
EG24842846
... Vol. 2, Issue 4, June-July 2012, pp.842-846 may be riding n high common mode voltage levels. This amplifier is particularly useful in amplifying ...
... Vol. 2, Issue 4, June-July 2012, pp.842-846 may be riding n high common mode voltage levels. This amplifier is particularly useful in amplifying ...
EE-305: Designing and Debugging Systems with SHARC Processors
... Another example is RSTOUT/CLKOUT signal multiplexed with running reset functionality on ADSP2137x SHARC processors (see Figure 1). At and after power on /RESET, this signal behaves as an RSTOUT signal. Execute software to configure this signal as an input and running reset signal. RSTOUT/CLKOUT sign ...
... Another example is RSTOUT/CLKOUT signal multiplexed with running reset functionality on ADSP2137x SHARC processors (see Figure 1). At and after power on /RESET, this signal behaves as an RSTOUT signal. Execute software to configure this signal as an input and running reset signal. RSTOUT/CLKOUT sign ...
Segmentation using eigenvectors: a unifying view
... In the SM algorithm, since N has two identical rst eigenvalues, v2 may be any linear combination of the eigenvectors, so the di erence between values for the rst and second cluster is arbitrary and depends on the implementation details of the eigendecomposition algorithm. In the SLH algorithm, we ...
... In the SM algorithm, since N has two identical rst eigenvalues, v2 may be any linear combination of the eigenvectors, so the di erence between values for the rst and second cluster is arbitrary and depends on the implementation details of the eigendecomposition algorithm. In the SLH algorithm, we ...
PCM1727 数据资料 dataSheet 下载
... a 27MHz master clock or crystal oscillator and generate all internal system clocks required to operate the digital filter and ∆Σ modulator, at 384fS. If an external master clock is used, XT2 must be connected to ground. In both cases, the signal amplitude on XT1 must satisfy the specification descri ...
... a 27MHz master clock or crystal oscillator and generate all internal system clocks required to operate the digital filter and ∆Σ modulator, at 384fS. If an external master clock is used, XT2 must be connected to ground. In both cases, the signal amplitude on XT1 must satisfy the specification descri ...
PowerPoint Sunusu
... channel card drivers to the DUT’s digital inputs. The tester can automatically compensate for the electrical delay in each transmission line, thereby removing timing skew from the digital signals. This deskewing process is known as time domain reflectometry, or TDR. ...
... channel card drivers to the DUT’s digital inputs. The tester can automatically compensate for the electrical delay in each transmission line, thereby removing timing skew from the digital signals. This deskewing process is known as time domain reflectometry, or TDR. ...
User’s Manual WT Communication (/E2) User’s Manual
... Calls attention to actions or conditions that could cause light injury to the user or cause damage to the instrument or user’s data, and precautions that can be taken to prevent such occurrences. Calls attention to information that is important for the proper operation of the instrument. Reference t ...
... Calls attention to actions or conditions that could cause light injury to the user or cause damage to the instrument or user’s data, and precautions that can be taken to prevent such occurrences. Calls attention to information that is important for the proper operation of the instrument. Reference t ...
Mathematical Programming for Data Mining
... With the widespread use of databases and the explosive growth in their sizes, individuals and organizations are faced with the problem of effectively utilizing this data. Traditionally, “use” of data has been limited to querying a reliable store via some well-circumscribed application or canned repo ...
... With the widespread use of databases and the explosive growth in their sizes, individuals and organizations are faced with the problem of effectively utilizing this data. Traditionally, “use” of data has been limited to querying a reliable store via some well-circumscribed application or canned repo ...
XA Artix-7 FPGAs Overview
... add/subtract/accumulate), or a logic unit that can generate any one of ten different logic functions of the two operands. The DSP includes an additional pre-adder, typically used in symmetrical filters. This pre-adder improves performance in densely packed designs and reduces the DSP slice count by ...
... add/subtract/accumulate), or a logic unit that can generate any one of ten different logic functions of the two operands. The DSP includes an additional pre-adder, typically used in symmetrical filters. This pre-adder improves performance in densely packed designs and reduces the DSP slice count by ...
COMPOSITION OF FINE-GRAINED BULK MATRIX AND
... including a nanophase Fe-hydroxide [7]. This material is holocrystalline and shows evidence of mild thermal annealing based on interlocking submicron grain boundaries that meet at 120° angles [7]. Figure 1 contains images of the bulk matrix, which was previously referred to as fine grained basaltic ...
... including a nanophase Fe-hydroxide [7]. This material is holocrystalline and shows evidence of mild thermal annealing based on interlocking submicron grain boundaries that meet at 120° angles [7]. Figure 1 contains images of the bulk matrix, which was previously referred to as fine grained basaltic ...
viretech - "PLDWorld.com"
... LVDS Advantages Save Money — High performance can be achieved using off the shelf FPGA’s — LVDS consumes less power, therefore one can use cheaper power supplies, or fewer fans — LVDS is low noise, so no more EMI headaches (save time). — Since LVDS is much faster than CMOS / TTL, LVDS signals can ...
... LVDS Advantages Save Money — High performance can be achieved using off the shelf FPGA’s — LVDS consumes less power, therefore one can use cheaper power supplies, or fewer fans — LVDS is low noise, so no more EMI headaches (save time). — Since LVDS is much faster than CMOS / TTL, LVDS signals can ...
Sequential Circuit Design
... Otherwise the input data to next sequential circuit will change while it is still holding its current data. ...
... Otherwise the input data to next sequential circuit will change while it is still holding its current data. ...
MAX125/MAX126 2x4-Channel, Simultaneous-Sampling 14-Bit DAS General Description
... An on-board sequencer converts one to four channels per CONVST pulse. In the default mode, one T/H output (CH1A) is converted. An interrupt signal (INT) is provided after the last conversion is complete. Convert two, three, or four channels by reprogramming the MAX125/MAX126 through the bidirectiona ...
... An on-board sequencer converts one to four channels per CONVST pulse. In the default mode, one T/H output (CH1A) is converted. An interrupt signal (INT) is provided after the last conversion is complete. Convert two, three, or four channels by reprogramming the MAX125/MAX126 through the bidirectiona ...
Differential Input, Dual, Simultaneous Sampling, 4.2 MSPS, 14-Bit, SAR ADC AD7357
... The AD7357 is a dual, 14-bit, high speed, low power, successive approximation analog-to-digital converter (ADC) that operates from a single 2.5 V power supply and features throughput rates up to 4.2 MSPS. The part contains two ADCs, each preceded by a low noise, wide bandwidth track-and-hold circuit ...
... The AD7357 is a dual, 14-bit, high speed, low power, successive approximation analog-to-digital converter (ADC) that operates from a single 2.5 V power supply and features throughput rates up to 4.2 MSPS. The part contains two ADCs, each preceded by a low noise, wide bandwidth track-and-hold circuit ...
Agilent HFBR-772B/BE and HFBR- 782B/BE Pluggable Parallel Fiber Optic
... Electromagnetic Interference (EMI) Many equipment designs using these high-data-rate modules will be required to meet the requirements of the FCC in the United States, CENELEC in Europe and VCCI in Japan. These modules, with their shielded design, perform to the levels detailed in the Regulatory Co ...
... Electromagnetic Interference (EMI) Many equipment designs using these high-data-rate modules will be required to meet the requirements of the FCC in the United States, CENELEC in Europe and VCCI in Japan. These modules, with their shielded design, perform to the levels detailed in the Regulatory Co ...
